Short circuit when setting multiple bits of la0?

[urish]

I believe think it might be possible to break the chip by mistakenly setting la0 (active) to 0xFFFFFFFF, thus activating all the designs at once.

Can we protect against this?

[mattvenn]

we could have a little design that sits between the logic analyser and the active lines and makes sure only one line goes high
it could also function as the 'what if caravel is broken' module you mentioned #31

but I don't think it's necessary. even if more than one design is turned on, the chip will just draw a bit more power and the line will be in an intermediate state. I don't think we would blow any mosfets. However, this is just a feeling from talking to Tim Edwards about what would happen if multiple designs were driving the logic analyser at the same time. maybe if we turned all the designs on it could damage something.

[mattvenn]

happy to add something to mpw5, but I propose we leave this for mpw4

[urish]

Thanks for the explanation!

What happens before the MGMT SOC starts? is the LA data guaranteed to be all zeroes? Or is there a chance it'll start in an undefined state, thus activating several designs at once, drawing too much power, and preventing the MGMT SOC from starting?