added LD type 7 from 4nec2

Author: maurymarkowitz

src/calculations.c

@@ -353,7 +353,7 @@ int apply_impedance_loading(nec_context_t *ctx, int *ldtyp, int *ldtag, int *ldt
 
     /* ldtyp is validated (0–6) by control.c before storage; this should
      * never fire. If it does, it is a programming error, not a user error. */
-    assert(ldtyp[istepx] <= 6 && "INTERNAL: IMPROPER LOAD TYPE stored in zload.load_types");
+    assert(ldtyp[istepx] <= 7 && "INTERNAL: IMPROPER LOAD TYPE stored in zload.load_types");
 
     /* search segments for proper itags */
     ldtags= ldtag[istepx];
@@ -454,6 +454,23 @@ int apply_impedance_loading(nec_context_t *ctx, int *ldtyp, int *ldtag, int *ldt
           break;
         }
 
+        case 8: {
+          /* LD type 7: insulated wire coating (Cebik method).
+           * F1 = dielectric constant (epsilon), F2 = outer radius R (m).
+           * r = bare wire radius (m) = geometry.radius[i] * wavelength.
+           * Converts to distributed series inductance (H/m) per the 4nec2 formula:
+           *   L = 2e-7 * (eps*R/r)^(1/12) * (1 - 1/eps) * ln(R/r)
+           * then applies as a series per-unit-length load (same as LD type 2, case 3). */
+          double eps  = zlr[istepx];   /* dielectric constant */
+          double R    = zli[istepx];   /* outer (insulation) radius, metres */
+          double r    = ctx->geometry.radius[i] * ctx->geometry.wavelength; /* wire radius, metres */
+          double ratio = R / r;
+          double L_pm = 2.0e-7 * pow(eps * ratio, 1.0/12.0) * (1.0 - 1.0/eps) * log(ratio);
+          /* series distributed impedance per half-length: jω·L_pm·(2·half_len) / (2·half_len) = jω·L_pm */
+          zt = tpcj * ctx->geometry.half_len[i] * L_pm / ctx->geometry.wavelength;
+          break;
+        }
+
       } /* switch( jump ) */
 
       if(( fabs( creal( ctx->zload.seg_impedance[i]))+ fabs( cimag( ctx->zload.seg_impedance[i]))) > 1.0e-20) {
@@ -526,6 +543,10 @@ int apply_impedance_loading(nec_context_t *ctx, int *ldtyp, int *ldtag, int *ldt
 
       case 7:
            add_loading_output(ctx, ldtags, ldtagf[istepx], ldtagt[istepx], 0.0, zli[istepx], zlc[istepx], "LC-TRAP");
+        break;
+
+      case 8:
+           add_loading_output(ctx, ldtags, ldtagf[istepx], ldtagt[istepx], zlr[istepx], zli[istepx], 0.0, "INSULATED WIRE");
 
     } /* switch( jump ) */
   } /* while( true ) */

src/control.c

@@ -653,7 +653,7 @@ static int process_next_batch(nec_context_t *ctx, deck_t *deck, int *batch_start
                 continue;
             }
 
-            if (i1 > 6) {
+            if (i1 > 7) {
                 char msg[MAX_ERROR_LEN];
                 snprintf(msg, sizeof(msg), "LD on line %d: type %d is not supported.", card_idx + 1, i1);
                 add_error(ctx, &ctx->errors, msg, FATAL);

src/deck_validations.c

@@ -561,7 +561,7 @@ void test_deck_structure(const nec_context_t *ctx, const deck_t *deck, errors_li
         int tag = deck->cards[i].i[2];
         int seg1 = deck->cards[i].i[3];
         int seg2 = deck->cards[i].i[4];
-        if (type < -1 || (type > 6 && type != -1))
+        if (type < -1 || (type > 7 && type != -1))
         {
           snprintf(msg, sizeof(msg), "LD on line %d: unexpected type I1=%d.", i, type);
           add_error(ctx, errors, msg, 0);
@@ -597,6 +597,15 @@ void test_deck_structure(const nec_context_t *ctx, const deck_t *deck, errors_li
           add_error(ctx, errors, msg, 0);
         }
       }
+      // LD type 7 (insulated wire): dielectric constant and coat radius are required
+      if (deck->cards[i].ints_used >= 1 && deck->cards[i].i[1] == 7)
+      {
+        if (deck->cards[i].flts_used < 2 || deck->cards[i].f[1] <= 0.0 || deck->cards[i].f[2] <= 0.0)
+        {
+          snprintf(msg, sizeof(msg), "LD on line %d (insulated wire): F1 (dielectric constant) and F2 (coat radius) must be positive.", i);
+          add_error(ctx, errors, msg, 0);
+        }
+      }
     }
     // record for open-end placement validation later (only for LD cards)
     if (strcmp(code, "LD") == 0 && deck->cards[i].ints_used >= 3)

test/ld7_insulated_test.deck

@@ -0,0 +1,12 @@
+CM Insulated wire test (LD type 7)
+CM Simple dipole with PVC insulation (diel=3.5) on tag 2; coat radius = 3mm
+CM Wire radius (GW) = 1mm, coating adds 2mm => outer radius = 0.003m
+CE
+GW 1 10 0 0 0 0.1 0 0 0.001
+GW 2 16 0.1 0 0 0.2 0 0 0.001
+GE 0
+FR 0 1 0 0 145
+LD 7 2 1 16 3.5 0.003
+EX 0 1 5 0 1 0
+RP 0 1 1 1000 90 0 0 0
+EN