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Commit 02e2c35

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Fix some issues found in the review.
1 parent 9ce4ae1 commit 02e2c35

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6 files changed

+27
-9
lines changed

6 files changed

+27
-9
lines changed

drivers/include/drivers/interfaces/InterfaceCAN.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,6 @@ class CAN;
4444
*/
4545

4646
/** CANMessage class
47-
*
48-
* @note Synchronization level: Thread safe
4947
*/
5048
class CANMessage : public CAN_Message {
5149

@@ -143,8 +141,6 @@ class CANMessage : public CAN_Message {
143141
#if DEVICE_CAN_FD
144142

145143
/** CANFDMessage class
146-
*
147-
* @note Synchronization level: Thread safe
148144
*/
149145
class CANFDMessage : public CANFD_Message {
150146

drivers/source/CAN.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ CAN::CAN(PinName rd, PinName td, int hz, int data_hz) : _can(), _irq()
3636
#if DEVICE_CAN_FD
3737
canfd_init_freq(&_can, rd, td, hz, data_hz);
3838
#else
39+
MBED_ASSERT(data_hz == 0);
3940
can_init_freq(&_can, rd, td, hz);
4041
#endif
4142
can_irq_init(&_can, (&CAN::_irq_handler), reinterpret_cast<uintptr_t>(this));
@@ -54,6 +55,7 @@ CAN::CAN(const can_pinmap_t &pinmap, int hz, int data_hz) : _can(), _irq()
5455
#if DEVICE_CAN_FD
5556
canfd_init_freq_direct(&_can, &pinmap, hz, data_hz);
5657
#else
58+
MBED_ASSERT(data_hz == 0);
5759
can_init_freq_direct(&_can, &pinmap, hz);
5860
#endif
5961
can_irq_init(&_can, (&CAN::_irq_handler), reinterpret_cast<uintptr_t>(this));
@@ -77,6 +79,7 @@ int CAN::frequency(int f, int data_f)
7779
#if DEVICE_CAN_FD
7880
int ret = canfd_frequency(&_can, f, data_f);
7981
#else
82+
MBED_ASSERT(data_f == 0);
8083
int ret = can_frequency(&_can, f);
8184
#endif
8285
unlock();

targets/TARGET_STM/TARGET_STM32L5/system_clock.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,9 @@ uint8_t SetSysClock_PLL_MSI(void)
193193
#endif
194194

195195
/* Enable MSI Auto calibration */
196+
#if MBED_CONF_TARGET_LSE_AVAILABLE
196197
HAL_RCCEx_EnableMSIPLLMode();
198+
#endif
197199

198200
return 1; // OK
199201
}

targets/TARGET_STM/TARGET_STM32U5/clock_cfg/system_clock.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -119,10 +119,11 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
119119
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
120120
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
121121

122-
/* GPIO Ports Clock Enable */
123-
__HAL_RCC_GPIOH_CLK_ENABLE();
124-
__HAL_RCC_GPIOB_CLK_ENABLE();
125122
__HAL_RCC_PWR_CLK_ENABLE();
123+
#if defined(UCPD1)
124+
HAL_PWREx_DisableUCPDDeadBattery(); /* Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */
125+
#endif
126+
HAL_PWREx_EnableVddA();
126127
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
127128
return 0; // FAIL
128129
}
@@ -190,6 +191,9 @@ uint8_t SetSysClock_PLL_HSI(void)
190191
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
191192

192193
__HAL_RCC_PWR_CLK_ENABLE();
194+
#if defined(UCPD1)
195+
HAL_PWREx_DisableUCPDDeadBattery(); /* Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */
196+
#endif
193197
HAL_PWREx_EnableVddA();
194198
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
195199

targets/TARGET_STM/can_api.c

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323
#include "pinmap.h"
2424
#include "PeripheralPins.h"
2525
#include "mbed_error.h"
26+
#include <memory.h>
2627

2728
// Some STM32G4 series (and others) have 3 FDCAN devices
2829
// while others have 2
@@ -632,7 +633,7 @@ int canfd_write(can_t *obj, CANFD_Message msg, int cc)
632633
TxHeader.DataLength = FDCAN_DLC_BYTES_64;
633634
break;
634635
default:
635-
error("Invalid message length for can_write\n");
636+
error("Invalid message length for canfd_write\n");
636637
return 0;
637638
}
638639
TxHeader.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
@@ -658,7 +659,8 @@ int can_read(can_t *obj, CAN_Message *msg, int handle)
658659
}
659660

660661
FDCAN_RxHeaderTypeDef RxHeader = {0};
661-
if (HAL_FDCAN_GetRxMessage(&obj->CanHandle, FDCAN_RX_FIFO0, &RxHeader, msg->data) != HAL_OK) {
662+
unsigned char data[64];
663+
if (HAL_FDCAN_GetRxMessage(&obj->CanHandle, FDCAN_RX_FIFO0, &RxHeader, data) != HAL_OK) {
662664
error("HAL_FDCAN_GetRxMessage error\n"); // Should not occur as previous HAL_FDCAN_GetRxFifoFillLevel call reported some data
663665
return 0;
664666
}
@@ -674,6 +676,12 @@ int can_read(can_t *obj, CAN_Message *msg, int handle)
674676
RxHeader.DataLength >>= 16;
675677
#endif
676678
msg->len = RxHeader.DataLength;
679+
if(msg->len > 8)
680+
{
681+
error("can_read unexpectedly received a FD frame\n");
682+
return 0;
683+
}
684+
memcpy(msg->data, data, msg->len);
677685
return 1;
678686
}
679687

targets/targets.json5

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4922,6 +4922,11 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
49224922
"value": "USE_PLL_MSI",
49234923
"macro_name": "CLOCK_SOURCE"
49244924
},
4925+
"hse_value": {
4926+
"help": "HSE default value is 16MHz in stm32u5xx_hal_conf.h",
4927+
"value": "16000000",
4928+
"macro_name": "HSE_VALUE"
4929+
},
49254930
"lpticker_lptim": {
49264931
"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
49274932
"value": 1

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