@@ -53,15 +53,7 @@ ENTRY(Reset_Handler)
5353
5454__ram_vector_table__ = 1;
5555
56- #if !defined(MBED_APP_START)
57- #define MBED_APP_START 0
58- #elif MBED_APP_START > 0 && MBED_APP_START < 0x410
59- #error MBED_APP_START too small and will overwrite interrupts and flash config
60- #endif
6156
62- #if !defined(MBED_APP_SIZE)
63- #define MBED_APP_SIZE 0x100000
64- #endif
6557
6658#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
6759 #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
@@ -72,19 +64,42 @@ __stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
7264STACK_SIZE = DEFINED (__stack_size__) ? __stack_size__ : 0x0400 ;
7365M_VECTOR_RAM_SIZE = DEFINED (__ram_vector_table__) ? 0x0400 : 0x0 ;
7466M_CRASH_DATA_RAM_SIZE = 0x100 ;
67+ FLASH_VTOR_TABLE_SIZE = 0x400 ;
68+ FLASH_CONFIG_FIELD_SIZE = 0x10 ;
69+
70+ /* If we are not configured to execute out of the start of ROM, then a bootloader is
71+ * present. This tells us whether we need to add the Flash Configuration Field at the start of flash. */
72+ #if MBED_CONFIGURED_ROM_BANK_IROM1_START == 0
73+ #define IS_BOOTLOADER_PRESENT 0
74+ #else
75+ #define IS_BOOTLOADER_PRESENT 1
76+ #endif
77+
78+ #if IS_BOOTLOADER_PRESENT && MBED_CONFIGURED_ROM_BANK_IROM1_START < 0x410
79+ #error MBED_CONFIGURED_ROM_BANK_IROM1_START too small and will overwrite interrupts and flash config
80+ #endif
81+
82+ /* Specify the ELF segments (program headers) */
83+ PHDRS
84+ {
85+ text PT_LOAD FLAGS (5 ); /* read + execute */
86+ ram_vector_table PT_LOAD FLAGS (6 ); /* read + write */
87+ ram_noinit PT_LOAD FLAGS (6 ); /* read + write */
88+ ram_init PT_LOAD FLAGS (6 ); /* read + write */
89+ sram_l PT_LOAD FLAGS (6 ); /* read + write */
90+ }
7591
7692/* Specify the memory areas */
7793MEMORY
7894{
79- #if MBED_APP_START == 0
80- m_interrupts (RX) : ORIGIN = MBED_APP_START, LENGTH = 0x400
81- m_flash_config (RX) : ORIGIN = MBED_APP_START + 0x400 , LENGTH = 0x10
82- m_text (RX) : ORIGIN = MBED_APP_START + 0x410 , LENGTH = MBED_APP_SIZE - 0x410
83- #else
84- m_text (RX) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
85- #endif
86- m_data (RW) : ORIGIN = 0x1FFF0000 , LENGTH = 0x00010000
87- m_data_2 (RW) : ORIGIN = 0x20000000 , LENGTH = 0x00030000
95+ m_text (RX) : ORIGIN = MBED_CONFIGURED_ROM_BANK_IROM1_START, LENGTH = MBED_CONFIGURED_ROM_BANK_IROM1_SIZE
96+
97+ /*
98+ * Note: while these two SRAMs occupy a contiguous address space, we have to keep them as
99+ * separate memory banks because the MCU doesn't support accesses that bridge the two banks.
100+ */
101+ m_sram_l (RW) : ORIGIN = MBED_RAM_BANK_SRAM_L_START, LENGTH = MBED_RAM_BANK_SRAM_L_SIZE
102+ m_sram_u (RW) : ORIGIN = MBED_RAM_BANK_SRAM_U_START, LENGTH = MBED_RAM_BANK_SRAM_U_SIZE
88103}
89104
90105/* Define output sections */
@@ -97,18 +112,20 @@ SECTIONS
97112 . = ALIGN (8 );
98113 KEEP (*(.isr_vector )) /* Startup code */
99114 . = ALIGN (8 );
100- #if MBED_APP_START == 0
101- } > m_interrupts
115+ } > m_text AT> m_text :text
102116
103- .flash_config :
117+ /* FCF to absolute address of 0x400, but only if bootloader is not present. */
118+ #if !IS_BOOTLOADER_PRESENT
119+ .flash_config FLASH_VTOR_TABLE_SIZE :
104120 {
105- . = ALIGN (8 );
106121 KEEP (*(.FlashConfig )) /* Flash Configuration Field (FCF) */
107- . = ALIGN (8 );
108- } > m_flash_config
122+ } > m_text AT> m_text :text
109123#else
110- } > m_text
124+ /DISCARD/ : {
125+ *(.FlashConfig )
126+ }
111127#endif
128+
112129 .text :
113130 {
114131
@@ -123,19 +140,19 @@ SECTIONS
123140 KEEP (*(.init ))
124141 KEEP (*(.fini ))
125142 . = ALIGN (8 );
126- } > m_text
143+ } > m_text AT> m_text :text
127144
128145 .ARM.extab :
129146 {
130147 *(.ARM .extab * .gnu .linkonce .armextab .*)
131- } > m_text
148+ } > m_text AT> m_text :text
132149
133150 .ARM :
134151 {
135152 __exidx_start = .;
136153 *(.ARM .exidx *)
137154 __exidx_end = .;
138- } > m_text
155+ } > m_text AT> m_text :text
139156
140157 .ctors :
141158 {
@@ -159,7 +176,7 @@ SECTIONS
159176 KEEP (*(SORT (.ctors .*)))
160177 KEEP (*(.ctors ))
161178 __CTOR_END__ = .;
162- } > m_text
179+ } > m_text AT> m_text :text
163180
164181 .dtors :
165182 {
@@ -170,78 +187,79 @@ SECTIONS
170187 KEEP (*(SORT (.dtors .*)))
171188 KEEP (*(.dtors ))
172189 __DTOR_END__ = .;
173- } > m_text
190+ } > m_text AT> m_text :text
174191
175192 .preinit_array :
176193 {
177194 PROVIDE_HIDDEN (__preinit_array_start = .);
178195 KEEP (*(.preinit_array *))
179196 PROVIDE_HIDDEN (__preinit_array_end = .);
180- } > m_text
197+ } > m_text AT> m_text :text
181198
182199 .init_array :
183200 {
184201 PROVIDE_HIDDEN (__init_array_start = .);
185202 KEEP (*(SORT (.init_array .*)))
186203 KEEP (*(.init_array *))
187204 PROVIDE_HIDDEN (__init_array_end = .);
188- } > m_text
205+ } > m_text AT> m_text :text
189206
190207 .fini_array :
191208 {
192209 PROVIDE_HIDDEN (__fini_array_start = .);
193210 KEEP (*(SORT (.fini_array .*)))
194211 KEEP (*(.fini_array *))
195212 PROVIDE_HIDDEN (__fini_array_end = .);
196- } > m_text
213+ } > m_text AT> m_text :text
197214
198- .interrupts_ram :
215+ #if MBED_CONF_PLATFORM_CRASH_CAPTURE_ENABLED
216+ /* Stick the crash data ram at the start of sram_l */
217+ .crash_data_ram : ALIGN (8 )
199218 {
200- . = ALIGN (8 );
201- __VECTOR_RAM__ = .;
202- __interrupts_ram_start__ = .; /* Create a global symbol at data start */
203- *(.m_interrupts_ram ) /* This is a user defined section */
204- . += M_VECTOR_RAM_SIZE;
205- . = ALIGN (8 );
206- __interrupts_ram_end__ = .; /* Define a global symbol at data end */
207- } > m_data
208-
209- .crash_data_ram :
210- {
211- . = ALIGN (8 );
212219 __CRASH_DATA_RAM__ = .;
213220 __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
214221 KEEP (*(.keep .crash_data_ram ))
215222 *(.m_crash_data_ram ) /* This is a user defined section */
216223 . += M_CRASH_DATA_RAM_SIZE;
217224 . = ALIGN (8 );
218225 __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
219- } > m_data
226+ } > m_sram_l :sram_l
227+ #endif
220228
221- .heap_0 :
229+ /* Fill the entire sram_l with the heap 0 section. */
230+ .heap_0 (NOLOAD) : ALIGN (8 )
222231 {
223- . = ALIGN (8 );
224232 __mbed_sbrk_start_0 = .;
225- . += (ORIGIN (m_data ) + LENGTH (m_data ) - .);
233+ . += (ORIGIN (m_sram_l ) + LENGTH (m_sram_l ) - .);
226234 __mbed_krbs_start_0 = .;
227- } > m_data
235+ } > m_sram_l :sram_l
228236
229237 __VECTOR_RAM = DEFINED (__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN (m_interrupts);
230238 __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED (__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0 ;
231239
232- .data :
240+ .interrupts_ram :
241+ {
242+ . = ALIGN (8 );
243+ __VECTOR_RAM__ = .;
244+ __interrupts_ram_start__ = .; /* Create a global symbol at data start */
245+ *(.m_interrupts_ram ) /* This is a user defined section */
246+ . += M_VECTOR_RAM_SIZE;
247+ . = ALIGN (8 );
248+ __interrupts_ram_end__ = .; /* Define a global symbol at data end */
249+ } > m_sram_u :ram_vector_table
250+
251+ .data : ALIGN (8 )
233252 {
234253 PROVIDE (__etext = LOADADDR (.data )); /* Define a global symbol at end of code, */
235254 PROVIDE (__DATA_ROM = LOADADDR (.data )); /* Symbol is used by startup for data initialization. */
236- . = ALIGN (8 );
237255 __DATA_RAM = .;
238256 __data_start__ = .; /* create a global symbol at data start */
239257 *(.data ) /* .data sections */
240258 *(.data *) /* .data* sections */
241259 KEEP (*(.jcr *))
242260 . = ALIGN (8 );
243261 __data_end__ = .; /* define a global symbol at data end */
244- } > m_data_2 AT > m_text
262+ } > m_sram_u AT > m_text :ram_init
245263
246264 __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
247265 text_end = ORIGIN (m_text) + LENGTH (m_text);
@@ -259,15 +277,14 @@ SECTIONS
259277 KEEP (*(.keep .uninitialized ))
260278 . = ALIGN (32 );
261279 __uninitialized_end = .;
262- } > m_data_2
280+ } > m_sram_u AT> m_sram_u :ram_noinit
263281
264282 USB_RAM_GAP = DEFINED (__usb_ram_size__) ? __usb_ram_size__ : 0x800 ;
265283
266284 /* Uninitialized data section */
267- .bss :
285+ .bss : ALIGN ( 8 )
268286 {
269287 /* This is used by the startup in order to initialize the .bss section */
270- . = ALIGN (8 );
271288 __START_BSS = .;
272289 __bss_start__ = .;
273290 *(.bss )
@@ -279,39 +296,41 @@ SECTIONS
279296 . = ALIGN (8 );
280297 __bss_end__ = .;
281298 __END_BSS = .;
282- } > m_data_2
299+ } > m_sram_u AT> m_sram_u :ram_noinit
283300
284- .heap :
301+ .heap : ALIGN ( 8 )
285302 {
286- . = ALIGN (8 );
287303 __end__ = .;
288304 PROVIDE (end = .);
305+
306+ ASSERT ((__end__ - ORIGIN (m_sram_u)) + STACK_SIZE <= LENGTH (m_sram_u), " SRAM_U is not large enough to contain globals and boot stack!" );
307+
289308 __mbed_sbrk_start = .;
290309 __HeapBase = .;
291- . = ORIGIN (m_data_2 ) + LENGTH (m_data_2 ) - STACK_SIZE;
310+ . = ORIGIN (m_sram_u ) + LENGTH (m_sram_u ) - STACK_SIZE;
292311 __mbed_krbs_start = .;
293312 __HeapLimit = .;
294313 __heap_limit = .; /* Add for _sbrk */
295- } > m_data_2
314+ } > m_sram_u AT> m_sram_u :ram_noinit
296315
297- m_usb_bdt USB_RAM_START (NOLOAD) :
316+ /* USB RAM sections. These live inside a "gap" created in .bss. */
317+ m_usb_bdt USB_RAM_START (OVERLAY) :
298318 {
299319 *(m_usb_bdt)
300320 USB_RAM_BDT_END = .;
301- }
321+ } :ram_noinit
302322
303- m_usb_global USB_RAM_BDT_END (NOLOAD ) :
323+ m_usb_global USB_RAM_BDT_END (OVERLAY ) :
304324 {
305325 *(m_usb_global)
306- }
326+ } :ram_noinit
307327
308328 /* Initializes stack on the end of block */
309- __StackTop = ORIGIN (m_data_2 ) + LENGTH (m_data_2 );
329+ __StackTop = ORIGIN (m_sram_u ) + LENGTH (m_sram_u );
310330 __StackLimit = __StackTop - STACK_SIZE;
311331 PROVIDE (__stack = __StackTop);
312332
313- .ARM .attributes 0 : { *(.ARM .attributes ) }
314-
315- ASSERT (__StackLimit >= __HeapLimit, " Region m_data_2 overflowed with stack and heap" )
316-
333+ /DISCARD/ : {
334+ *(.ARM .attributes )
335+ }
317336}
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