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Jamie Smith
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Add KL25Z upload method support, upconvert ARDUINO form factor (#433)
* Add KL25Z upload method support, upconvert ARDUINO form factor * Fix typo
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10 files changed

+222
-94
lines changed

10 files changed

+222
-94
lines changed

targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ target_sources(mbed-kl25z
2424
mbed_overrides.c
2525
serial_api.c
2626
spi_api.c
27+
clk_freqs.c
2728

2829
device/system_MKL25Z4.c
2930
${STARTUP_FILE}

targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/PinNames.h

Lines changed: 34 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -195,55 +195,50 @@ typedef enum {
195195
PTE30 = 0x4078,
196196
PTE31 = 0x407c,
197197

198-
LED_RED = PTB18,
199-
LED_GREEN = PTB19,
200-
LED_BLUE = PTD1,
201-
202-
// mbed original LED naming
203-
LED1 = LED_RED,
204-
LED2 = LED_GREEN,
205-
LED3 = LED_BLUE,
206-
LED4 = LED_BLUE,
207-
208198
// USB Pins
209199
CONSOLE_TX = PTA2,
210200
CONSOLE_RX = PTA1,
211201

202+
#ifdef TARGET_FF_ARDUINO_UNO
212203
// Arduino Headers
213-
D0 = PTA1,
214-
D1 = PTA2,
215-
D2 = PTD4,
216-
D3 = PTA12,
217-
D4 = PTA4,
218-
D5 = PTA5,
219-
D6 = PTC8,
220-
D7 = PTC9,
221-
D8 = PTA13,
222-
D9 = PTD5,
223-
D10 = PTD0,
224-
D11 = PTD2,
225-
D12 = PTD3,
226-
D13 = PTD1,
227-
D14 = PTE0,
228-
D15 = PTE1,
229-
230-
A0 = PTB0,
231-
A1 = PTB1,
232-
A2 = PTB2,
233-
A3 = PTB3,
234-
A4 = PTC2,
235-
A5 = PTC1,
236-
237-
I2C_SCL = D15,
238-
I2C_SDA = D14,
239-
240-
TSI_ELEC0 = PTB16,
241-
TSI_ELEC1 = PTB17,
204+
ARDUINO_UNO_D0 = PTA1,
205+
ARDUINO_UNO_D1 = PTA2,
206+
ARDUINO_UNO_D2 = PTD4,
207+
ARDUINO_UNO_D3 = PTA12,
208+
ARDUINO_UNO_D4 = PTA4,
209+
ARDUINO_UNO_D5 = PTA5,
210+
ARDUINO_UNO_D6 = PTC8,
211+
ARDUINO_UNO_D7 = PTC9,
212+
ARDUINO_UNO_D8 = PTA13,
213+
ARDUINO_UNO_D9 = PTD5,
214+
ARDUINO_UNO_D10 = PTD0,
215+
ARDUINO_UNO_D11 = PTD2,
216+
ARDUINO_UNO_D12 = PTD3,
217+
ARDUINO_UNO_D13 = PTD1,
218+
ARDUINO_UNO_D14 = PTE0,
219+
ARDUINO_UNO_D15 = PTE1,
220+
221+
ARDUINO_UNO_A0 = PTB0,
222+
ARDUINO_UNO_A1 = PTB1,
223+
ARDUINO_UNO_A2 = PTB2,
224+
ARDUINO_UNO_A3 = PTB3,
225+
ARDUINO_UNO_A4 = PTC2,
226+
ARDUINO_UNO_A5 = PTC1,
227+
#endif
242228

243229
// Not connected
244230
NC = (int)0xFFFFFFFF
245231
} PinName;
246232

233+
// LEDs -------------------------------
234+
#define LED1 PTB18 // LED_RED
235+
#define LED2 PTB19 // LED_BLUE
236+
#define LED3 PTD1 // LED_GREEN
237+
238+
// Touch Sensor Pins ------------------
239+
#define TSI_ELEC0 PTB16
240+
#define TSI_ELEC1 PTB17
241+
247242
/* PullDown not available for KL25 */
248243
typedef enum {
249244
PullNone = 0,
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2006-2013 ARM Limited
2+
* Copyright (c) 2006-2013 ARM Limited
33
* SPDX-License-Identifier: Apache-2.0
44
*
55
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,56 +14,21 @@
1414
* See the License for the specific language governing permissions and
1515
* limitations under the License.
1616
*/
17-
#ifndef MBED_CLK_FREQS_H
18-
#define MBED_CLK_FREQS_H
1917

20-
#ifdef __cplusplus
21-
extern "C" {
22-
#endif
23-
24-
#include "PeripheralPins.h"
25-
26-
//Get the peripheral bus clock frequency
27-
static inline uint32_t bus_frequency(void) {
28-
return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
29-
}
30-
31-
#if defined(TARGET_KL43Z)
32-
33-
static inline uint32_t extosc_frequency(void) {
34-
return CPU_XTAL_CLK_HZ;
35-
}
36-
37-
static inline uint32_t fastirc_frequency(void) {
38-
return CPU_INT_FAST_CLK_HZ;
39-
}
40-
41-
static inline uint32_t mcgirc_frequency(void) {
42-
uint32_t mcgirc_clock = 0;
43-
44-
if (MCG->C1 & MCG_C1_IREFSTEN_MASK) {
45-
mcgirc_clock = (MCG->C2 & MCG_C2_IRCS_MASK) ? 8000000u : 2000000u;
46-
mcgirc_clock /= 1u + ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT);
47-
mcgirc_clock /= 1u + (MCG->MC & MCG_MC_LIRC_DIV2_MASK);
48-
}
49-
50-
return mcgirc_clock;
51-
}
52-
53-
#else
18+
#include "clk_freqs.h"
5419

5520
//Get external oscillator (crystal) frequency
56-
static uint32_t extosc_frequency(void) {
21+
uint32_t extosc_frequency(void) {
5722
uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
5823

5924
if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock
6025
return MCGClock;
6126

6227
uint32_t divider, multiplier;
63-
#ifdef MCG_C5_PLLCLKEN0_MASK //PLL available
28+
#ifdef MCG_C5_PLLCLKEN0_MASK //PLL available
6429
if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected
6530
if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
66-
#endif
31+
#endif
6732
if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference
6833
divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
6934
if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
@@ -99,14 +64,14 @@ static uint32_t extosc_frequency(void) {
9964

10065
return MCGClock * divider / multiplier;
10166
}
102-
#ifdef MCG_C5_PLLCLKEN0_MASK
67+
#ifdef MCG_C5_PLLCLKEN0_MASK
10368
} else { //PLL is selected
10469
divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
10570
multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
10671
return MCGClock * divider / multiplier;
10772
}
10873
}
109-
#endif
74+
#endif
11075

11176
//In all other cases either there is no crystal or we cannot determine it
11277
//For example when the FLL is running on the internal reference, and there is also an
@@ -115,31 +80,24 @@ static uint32_t extosc_frequency(void) {
11580
}
11681

11782
//Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit
118-
static uint32_t mcgpllfll_frequency(void) {
83+
uint32_t mcgpllfll_frequency(void) {
11984
if ((MCG->C1 & MCG_C1_CLKS_MASK) != MCG_C1_CLKS(0)) //PLL/FLL is not selected
12085
return 0;
12186

12287
uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
123-
#ifdef MCG_C5_PLLCLKEN0_MASK
88+
#ifdef MCG_C5_PLLCLKEN0_MASK
12489
if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
12590
SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is FLL output
126-
#endif
91+
#endif
12792
return MCGClock;
128-
#ifdef MCG_C5_PLLCLKEN0_MASK
93+
#ifdef MCG_C5_PLLCLKEN0_MASK
12994
} else { //PLL is selected
13095
SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is PLL output
13196
return (MCGClock >> 1);
13297
}
133-
#endif
98+
#endif
13499

135100
//It is possible the SystemCoreClock isn't running on the PLL, and the PLL is still active
136101
//for the peripherals, this is however an unlikely setup
137102
}
138103

139-
#endif
140-
141-
#ifdef __cplusplus
142-
}
143-
#endif
144-
145-
#endif
Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
* SPDX-License-Identifier: Apache-2.0
4+
*
5+
* Licensed under the Apache License, Version 2.0 (the "License");
6+
* you may not use this file except in compliance with the License.
7+
* You may obtain a copy of the License at
8+
*
9+
* http://www.apache.org/licenses/LICENSE-2.0
10+
*
11+
* Unless required by applicable law or agreed to in writing, software
12+
* distributed under the License is distributed on an "AS IS" BASIS,
13+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14+
* See the License for the specific language governing permissions and
15+
* limitations under the License.
16+
*/
17+
#ifndef MBED_CLK_FREQS_H
18+
#define MBED_CLK_FREQS_H
19+
20+
#ifdef __cplusplus
21+
extern "C" {
22+
#endif
23+
24+
#include "PeripheralPins.h"
25+
26+
//Get the peripheral bus clock frequency
27+
static inline uint32_t bus_frequency(void) {
28+
return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
29+
}
30+
31+
//Get external oscillator (crystal) frequency
32+
uint32_t extosc_frequency(void);
33+
34+
//Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit
35+
uint32_t mcgpllfll_frequency(void);
36+
37+
#ifdef __cplusplus
38+
}
39+
#endif
40+
41+
#endif

targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ target_sources(mbed-kl46z
2525
mbed_overrides.c
2626
serial_api.c
2727
spi_api.c
28+
clk_freqs.c
2829

2930
device/system_MKL46Z4.c
3031
${STARTUP_FILE}
Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,28 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
* SPDX-License-Identifier: Apache-2.0
4+
*
5+
* Licensed under the Apache License, Version 2.0 (the "License");
6+
* you may not use this file except in compliance with the License.
7+
* You may obtain a copy of the License at
8+
*
9+
* http://www.apache.org/licenses/LICENSE-2.0
10+
*
11+
* Unless required by applicable law or agreed to in writing, software
12+
* distributed under the License is distributed on an "AS IS" BASIS,
13+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14+
* See the License for the specific language governing permissions and
15+
* limitations under the License.
16+
*/
17+
18+
uint32_t mcgirc_frequency(void) {
19+
uint32_t mcgirc_clock = 0;
20+
21+
if (MCG->C1 & MCG_C1_IREFSTEN_MASK) {
22+
mcgirc_clock = (MCG->C2 & MCG_C2_IRCS_MASK) ? 8000000u : 2000000u;
23+
mcgirc_clock /= 1u + ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT);
24+
mcgirc_clock /= 1u + (MCG->MC & MCG_MC_LIRC_DIV2_MASK);
25+
}
26+
27+
return mcgirc_clock;
28+
}
Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,45 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
* SPDX-License-Identifier: Apache-2.0
4+
*
5+
* Licensed under the Apache License, Version 2.0 (the "License");
6+
* you may not use this file except in compliance with the License.
7+
* You may obtain a copy of the License at
8+
*
9+
* http://www.apache.org/licenses/LICENSE-2.0
10+
*
11+
* Unless required by applicable law or agreed to in writing, software
12+
* distributed under the License is distributed on an "AS IS" BASIS,
13+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14+
* See the License for the specific language governing permissions and
15+
* limitations under the License.
16+
*/
17+
#ifndef MBED_CLK_FREQS_H
18+
#define MBED_CLK_FREQS_H
19+
20+
#ifdef __cplusplus
21+
extern "C" {
22+
#endif
23+
24+
#include "PeripheralPins.h"
25+
26+
//Get the peripheral bus clock frequency
27+
static inline uint32_t bus_frequency(void) {
28+
return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
29+
}
30+
31+
static inline uint32_t extosc_frequency(void) {
32+
return CPU_XTAL_CLK_HZ;
33+
}
34+
35+
static inline uint32_t fastirc_frequency(void) {
36+
return CPU_INT_FAST_CLK_HZ;
37+
}
38+
39+
uint32_t mcgirc_frequency(void);
40+
41+
#ifdef __cplusplus
42+
}
43+
#endif
44+
45+
#endif

targets/targets.json5

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -521,7 +521,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
521521
// Freescale (now NXP) Kinetis Targets -----------------------------------------------------------------------------
522522
"KL25Z": {
523523
"supported_form_factors": [
524-
"ARDUINO"
524+
"ARDUINO_UNO"
525525
],
526526
"core": "Cortex-M0+",
527527
"extra_labels": [

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