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lines changed Original file line number Diff line number Diff line change @@ -135,16 +135,13 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
135135 RCC_OscInitStruct .HSEState = RCC_HSE_BYPASS ; // External clock on OSC_IN
136136 }
137137 RCC_OscInitStruct .HSI48State = RCC_HSI48_ON ;
138- #if (HSE_VALUE % 5000000 ) == 0UL
139138 RCC_OscInitStruct .PLL .PLLState = RCC_PLL_ON ;
140139 RCC_OscInitStruct .PLL .PLLSource = RCC_PLLSOURCE_HSE ;
141140 RCC_OscInitStruct .PLL .PLLMBOOST = RCC_PLLMBOOST_DIV1 ;
141+ #if (HSE_VALUE % 5000000 ) == 0UL
142142 RCC_OscInitStruct .PLL .PLLM = HSE_VALUE / 5000000 ; // VCO input clock = 5 MHz
143143 RCC_OscInitStruct .PLL .PLLN = 32 ; // VCO output clock = 160 MHz (5 MHz * 32)
144144#elif (HSE_VALUE % 4000000 ) == 0UL
145- RCC_OscInitStruct .PLL .PLLState = RCC_PLL_ON ;
146- RCC_OscInitStruct .PLL .PLLSource = RCC_PLLSOURCE_HSE ;
147- RCC_OscInitStruct .PLL .PLLMBOOST = RCC_PLLMBOOST_DIV1 ;
148145 RCC_OscInitStruct .PLL .PLLM = HSE_VALUE / 4000000 ; // VCO input clock = 4 MHz
149146 RCC_OscInitStruct .PLL .PLLN = 40 ; // VCO output clock = 160 MHz (4 MHz * 40)
150147#else
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