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Jamie Smith
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Refactor flash setup for MIMXRT105x devices, add flash API support for MIMXRT1062 EVK (#187)
* Refactor flash setup for MIMXRT105x devices, adds flash support for MIMXRT1062 EVK * Remove commented code * Use BOARD_FLASH_SIZE in boot headers * Fix setting which should be disabled in run mode
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25 files changed

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-155
lines changed

25 files changed

+388
-155
lines changed

CMakeLists.txt

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -187,11 +187,8 @@ if(NOT MBED_IS_NATIVE_BUILD)
187187
# We must set this global property before the targets subdirectory is added to the project. This is
188188
# required because the MBED_TARGET depends on the response file. If the path to the response file
189189
# is not defined when the target requests it the config definitions will not be passed to CPP.
190-
#
191-
# TODO: Remove this and find a more idiomatic way of passing compile definitions to CPP without
192-
# using response files or global properties.
193190
mbed_generate_options_for_linker(mbed-core-flags RESPONSE_FILE_PATH)
194-
set_property(GLOBAL PROPERTY COMPILE_DEFS_RESPONSE_FILE ${RESPONSE_FILE_PATH})
191+
set_property(GLOBAL PROPERTY LINKER_SCRIPT_PREPROCESS_FLAGS_RESPONSE_FILE ${RESPONSE_FILE_PATH})
195192

196193
# Add compile definitions for backward compatibility with the toolchain
197194
# supported. New source files should instead check for __GNUC__ and __clang__

drivers/include/drivers/FlashIAP.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,8 @@
3232
#include "platform/NonCopyable.h"
3333
#include <algorithm>
3434

35-
// Export ROM end address
35+
// Export ROM end address, if not defined by HAL layer
36+
#ifndef FLASHIAP_APP_ROM_END_ADDR
3637
#if defined(TOOLCHAIN_GCC_ARM)
3738
extern uint32_t __etext;
3839
extern uint32_t __data_start__;
@@ -48,6 +49,7 @@ extern uint32_t Load$$LR$$LR_IROM1$$Limit[];
4849
#define FLASHIAP_APP_ROM_END_ADDR std::max(std::max((uint32_t) __section_end(".rodata"), (uint32_t) __section_end(".text")), \
4950
(uint32_t) __section_end(".init_array"))
5051
#endif
52+
#endif
5153

5254
namespace mbed {
5355

hal/include/hal/flash_api.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,10 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address);
111111
*/
112112
uint32_t flash_get_page_size(const flash_t *obj);
113113

114-
/** Get start address for the flash region
114+
/** Get start address for the flash region (as in, where the flash is mapped in main memory).
115+
*
116+
* \note This should return the start address of the entire flash region, not
117+
* the first address after the end of the program in flash.
115118
*
116119
* @param obj The flash object
117120
* @return The start address for the flash region

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/CMakeLists.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,7 @@ target_include_directories(mbed-mimxrt1050-evk
1212
target_sources(mbed-mimxrt1050-evk
1313
INTERFACE
1414
fsl_flexspi_nor_boot.c
15-
16-
TARGET_1050_EVK/flash_api.c
15+
flash_api.c
1716

1817
TARGET_1050_EVK/xip/evkbimxrt1050_flexspi_nor_config.c
1918
TARGET_1050_EVK/xip/evkbimxrt1050_sdram_ini_dcd.c
@@ -35,6 +34,7 @@ target_include_directories(mbed-mimxrt1060-evk
3534
target_sources(mbed-mimxrt1060-evk
3635
INTERFACE
3736
fsl_flexspi_nor_boot.c
37+
flash_api.c
3838

3939
TARGET_1060_EVK/xip/evkbmimxrt1060_flexspi_nor_config.c
4040
TARGET_1060_EVK/xip/dcd.c

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/TARGET_1050_EVK/xip/evkbimxrt1050_flexspi_nor_config.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,8 @@
1212
#define FSL_COMPONENT_ID "platform.drivers.xip_board"
1313
#endif
1414

15+
#include "mimxrt_memory_info.h"
16+
1517
/*******************************************************************************
1618
* Code
1719
******************************************************************************/
@@ -37,7 +39,7 @@ const flexspi_nor_config_t hyperflash_config = {
3739
(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) | (1u << kFlexSpiMiscOffset_DiffClkEnable),
3840
.sflashPadType = kSerialFlash_8Pads,
3941
.serialClkFreq = kFlexSpiSerialClk_133MHz,
40-
.sflashA1Size = 64u * 1024u * 1024u,
42+
.sflashA1Size = BOARD_FLASH_SIZE,
4143
.dataValidTime = {16u, 16u},
4244
.lookupTable = {
4345
// Read LUTs
@@ -66,7 +68,7 @@ const flexspi_nor_config_t qspiflash_config = {
6668
.sflashPadType = kSerialFlash_4Pads,
6769
.serialClkFreq = kFlexSpiSerialClk_133MHz,
6870
.lutCustomSeqEnable = 0u,
69-
.sflashA1Size = 0x00800000u, /* 8MB/64Mbit */
71+
.sflashA1Size = BOARD_FLASH_SIZE,
7072
.lookupTable = {
7173
// Fast read sequence
7274
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/TARGET_1060_EVK/xip/evkbmimxrt1060_flexspi_nor_config.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
*/
77

88
#include "evkbmimxrt1060_flexspi_nor_config.h"
9+
#include "mimxrt_memory_info.h"
910

1011
/* Component ID definition, used by tools. */
1112
#ifndef FSL_COMPONENT_ID
@@ -34,7 +35,7 @@ const flexspi_nor_config_t qspiflash_config = {
3435
.deviceType = kFlexSpiDeviceType_SerialNOR,
3536
.sflashPadType = kSerialFlash_4Pads,
3637
.serialClkFreq = kFlexSpiSerialClk_120MHz,
37-
.sflashA1Size = 8u * 1024u * 1024u,
38+
.sflashA1Size = BOARD_FLASH_SIZE,
3839
.lookupTable =
3940
{
4041
// Read LUTs

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT105x/TARGET_EVK/device.h

Lines changed: 8 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -19,32 +19,22 @@
1919
#ifndef MBED_DEVICE_H
2020
#define MBED_DEVICE_H
2121

22-
#define DEVICE_ID_LENGTH 24
22+
#include <stdint.h>
2323

24-
#ifdef HYPERFLASH_BOOT
25-
/* 64MB HyperFlash, 4MB reserved for mbed-os */
26-
#define BOARD_FLASH_SIZE (0x4000000U)
27-
#define BOARD_FLASH_START_ADDR (0x60000000U)
28-
#define BOARD_FLASHIAP_SIZE (0x3C00000U)
29-
#define BOARD_FLASHIAP_START_ADDR (0x60400000U)
30-
#define BOARD_FLASH_PAGE_SIZE (512)
31-
#define BOARD_FLASH_SECTOR_SIZE (262144)
32-
#else
33-
/* 8MB QSPI Flash, 64KB reserved for mbed_bootloader */
34-
#define BOARD_FLASH_SIZE (0x800000U)
35-
#define BOARD_FLASH_START_ADDR (0x60000000U)
36-
#define BOARD_FLASHIAP_SIZE (0x7F0000U)
37-
#define BOARD_FLASHIAP_START_ADDR (0x60010000U)
38-
#define BOARD_FLASH_PAGE_SIZE (256)
39-
#define BOARD_FLASH_SECTOR_SIZE (4096)
40-
#endif
24+
#define DEVICE_ID_LENGTH 24
4125

4226
#define BOARD_ENET_PHY_ADDR (2)
4327

4428
/* CMSIS defines this, we use it as linker symbol, undefined it and let a linker symbol
4529
to be as vector table */
4630
#undef __VECTOR_TABLE
4731

32+
// The MIMXRT linker script provides the __USED_FLASH_END symbol to
33+
// indicate where application data ends in flash
34+
extern uint8_t __USED_FLASH_END[0];
35+
#define FLASHIAP_APP_ROM_END_ADDR ((uint32_t)__USED_FLASH_END)
36+
37+
#include "mimxrt_memory_info.h"
4838
#include "objects.h"
4939

5040
#endif
Lines changed: 89 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,10 @@
2424
#include "fsl_flexspi.h"
2525
#include "fsl_cache.h"
2626
#include "flash_defines.h"
27+
#include "mimxrt_flash_api.h"
28+
29+
#include <inttypes.h>
30+
#include <stdio.h>
2731

2832
AT_QUICKACCESS_SECTION_CODE(void flexspi_update_lut_ram(void));
2933
AT_QUICKACCESS_SECTION_CODE(status_t flexspi_nor_write_enable_ram(uint32_t baseAddr));
@@ -103,6 +107,13 @@ void flexspi_update_lut_ram(void)
103107
config.enableSckBDiffOpt = true;
104108
config.rxSampleClock = kFLEXSPI_ReadSampleClkExternalInputFromDqsPad;
105109
config.enableCombination = true;
110+
111+
/* Wait for bus idle. It seems to be important to hold off on calling
112+
* FLEXSPI_Init() until after the bus is idle; I was getting random crashes
113+
* until I added this. */
114+
while (!FLEXSPI_GetBusIdleStatus(FLEXSPI)) {
115+
}
116+
106117
FLEXSPI_Init(FLEXSPI, &config);
107118

108119
/* Configure flash settings according to serial flash feature. */
@@ -116,6 +127,10 @@ void flexspi_update_lut_ram(void)
116127
/* Wait for bus idle. */
117128
while (!FLEXSPI_GetBusIdleStatus(FLEXSPI)) {
118129
}
130+
131+
// Just in case any bad data got into the I-cache while we were reconfiguring
132+
// the flash, wipe it.
133+
SCB_InvalidateICache();
119134
}
120135

121136
status_t flexspi_nor_write_enable_ram(uint32_t baseAddr)
@@ -319,13 +334,31 @@ status_t flexspi_nor_flash_page_program_ram(uint32_t address, const uint32_t *sr
319334

320335
#else
321336
AT_QUICKACCESS_SECTION_CODE(status_t flexspi_nor_enable_quad_mode_ram(void));
337+
AT_QUICKACCESS_SECTION_CODE(status_t flexspi_nor_read_status_register_ram(uint32_t * result));
338+
339+
/*
340+
* Check if quad SPI mode is enabled and, if not, enable it.
341+
*
342+
* Note that I'm not totally sure if this function is needed because I don't think
343+
* that the application could boot without quad mode enabled, but this might be
344+
* useful for programming non-boot-device flashes at a later date.
345+
* Or, if you must run the application on a flash which does not have quad mode enabled,
346+
* you could temporarily change the boot header read command to use 1-pad read,
347+
* then rely on this function to update the setting.
348+
*/
322349
status_t flexspi_nor_enable_quad_mode_ram(void)
323350
{
324-
flexspi_transfer_t flashXfer;
325-
uint32_t writeValue = FLASH_QUAD_ENABLE;
326-
status_t status = kStatus_Success;
351+
uint32_t readResult = 0;
352+
status_t status = flexspi_nor_read_status_register_ram(&readResult);
353+
if (status != kStatus_Success) {
354+
return status;
355+
}
356+
357+
if(readResult & (1 << FLASH_QE_STATUS_OFFSET)) {
358+
// QSPI mode already enabled, don't need to do anything
359+
return kStatus_Success;
360+
}
327361

328-
flexspi_memset(&flashXfer, 0, sizeof(flashXfer));
329362
/* Write enable */
330363
status = flexspi_nor_write_enable_ram(0);
331364

@@ -334,6 +367,8 @@ status_t flexspi_nor_enable_quad_mode_ram(void)
334367
}
335368

336369
/* Enable quad mode. */
370+
flexspi_transfer_t flashXfer = {};
371+
uint32_t writeValue = (1 << FLASH_QE_STATUS_OFFSET);
337372
flashXfer.deviceAddress = 0;
338373
flashXfer.port = kFLEXSPI_PortA1;
339374
flashXfer.cmdType = kFLEXSPI_Write;
@@ -349,17 +384,12 @@ status_t flexspi_nor_enable_quad_mode_ram(void)
349384

350385
status = flexspi_nor_wait_bus_busy_ram();
351386

352-
/* Do software reset. */
353-
FLEXSPI_SoftwareReset(FLEXSPI);
354-
355387
return status;
356388
}
357389

358390
void flexspi_update_lut_ram(void)
359391
{
360-
flexspi_config_t config;
361-
362-
flexspi_memset(&config, 0, sizeof(config));
392+
flexspi_config_t config = {};
363393

364394
/*Get FLEXSPI default settings and configure the flexspi. */
365395
FLEXSPI_GetDefaultConfig(&config);
@@ -370,6 +400,15 @@ void flexspi_update_lut_ram(void)
370400
config.ahbConfig.enableReadAddressOpt = true;
371401
config.ahbConfig.enableAHBCachable = true;
372402
config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
403+
config.enableDoze = false; // matches boot rom setting
404+
config.seqTimeoutCycle = 0xee6c; // matches boot rom setting
405+
406+
/* Wait for bus idle. It seems to be important to hold off on calling
407+
* FLEXSPI_Init() until after the bus is idle; I was getting random crashes
408+
* until I added this. */
409+
while (!FLEXSPI_GetBusIdleStatus(FLEXSPI)) {
410+
}
411+
373412
FLEXSPI_Init(FLEXSPI, &config);
374413

375414
/* Configure flash settings according to serial flash feature. */
@@ -383,7 +422,12 @@ void flexspi_update_lut_ram(void)
383422
/* Wait for bus idle. */
384423
while (!FLEXSPI_GetBusIdleStatus(FLEXSPI)) {
385424
}
425+
386426
flexspi_nor_enable_quad_mode_ram();
427+
428+
// Just in case any bad data got into the I-cache while we were reconfiguring
429+
// the flash, wipe it.
430+
SCB_InvalidateICache();
387431
}
388432

389433
status_t flexspi_nor_write_enable_ram(uint32_t baseAddr)
@@ -404,47 +448,46 @@ status_t flexspi_nor_write_enable_ram(uint32_t baseAddr)
404448
return status;
405449
}
406450

407-
status_t flexspi_nor_wait_bus_busy_ram(void)
451+
// Read the status register and save the result into the given pointer
452+
status_t flexspi_nor_read_status_register_ram(uint32_t * result)
408453
{
409-
/* Wait status ready. */
410-
bool isBusy;
411-
uint32_t readValue;
412-
status_t status = kStatus_Success;
413-
flexspi_transfer_t flashXfer;
414-
415-
flexspi_memset(&flashXfer, 0, sizeof(flashXfer));
454+
flexspi_transfer_t flashXfer = {};
416455

417456
flashXfer.deviceAddress = 0;
418457
flashXfer.port = kFLEXSPI_PortA1;
419458
flashXfer.cmdType = kFLEXSPI_Read;
420459
flashXfer.SeqNumber = 1;
421460
flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READSTATUSREG;
422-
flashXfer.data = &readValue;
461+
flashXfer.data = result;
423462
flashXfer.dataSize = 1;
424463

464+
return FLEXSPI_TransferBlocking(FLEXSPI, &flashXfer);
465+
}
466+
467+
status_t flexspi_nor_wait_bus_busy_ram(void)
468+
{
469+
/* Wait status ready. */
470+
bool isBusy;
471+
425472
do {
426-
status = FLEXSPI_TransferBlocking(FLEXSPI, &flashXfer);
473+
uint32_t readResult;
474+
status_t status = flexspi_nor_read_status_register_ram(&readResult);
427475

428476
if (status != kStatus_Success) {
429477
return status;
430478
}
431-
if (FLASH_BUSY_STATUS_POL) {
432-
if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) {
433-
isBusy = true;
434-
} else {
435-
isBusy = false;
436-
}
437-
} else {
438-
if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) {
439-
isBusy = false;
440-
} else {
441-
isBusy = true;
442-
}
479+
480+
if(readResult & (1U << FLASH_BUSY_STATUS_OFFSET)) {
481+
isBusy = FLASH_BUSY_STATUS_POL;
482+
}
483+
else
484+
{
485+
isBusy = !FLASH_BUSY_STATUS_POL;
443486
}
444487

445488
} while (isBusy);
446489

447-
return status;
490+
return kStatus_Success;
448491
}
449492

450493

@@ -540,12 +583,18 @@ void flexspi_nor_flash_read_data_ram(uint32_t addr, uint32_t *buffer, uint32_t s
540583
memcpy(buffer, (void *)addr, size);
541584
}
542585

543-
int32_t flash_init(flash_t *obj)
586+
void mimxrt_flash_setup(void)
544587
{
545588
core_util_critical_section_enter();
546589
flexspi_update_lut_ram();
547590
core_util_critical_section_exit();
591+
}
548592

593+
int32_t flash_init(flash_t *obj)
594+
{
595+
// Setup is already done when the application boots by flash_setup().
596+
// Nothing left to do.
597+
(void)obj;
549598
return 0;
550599
}
551600

@@ -581,6 +630,8 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
581630
if (status != kStatus_Success) {
582631
ret = -1;
583632
} else {
633+
SCB_InvalidateICache_by_Addr((void*)address, (int32_t)size);
634+
SCB_InvalidateDCache_by_Addr((void*)address, (int32_t)size);
584635
DCACHE_InvalidateByRange(address, size);
585636
}
586637

@@ -604,8 +655,8 @@ int32_t flash_free(flash_t *obj)
604655
uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
605656
{
606657
uint32_t sectorsize = MBED_FLASH_INVALID_SIZE;
607-
uint32_t devicesize = BOARD_FLASHIAP_SIZE;
608-
uint32_t startaddr = BOARD_FLASHIAP_START_ADDR;
658+
uint32_t devicesize = BOARD_FLASH_SIZE;
659+
uint32_t startaddr = BOARD_FLASH_START_ADDR;
609660

610661
if ((address >= startaddr) && (address < (startaddr + devicesize))) {
611662
sectorsize = BOARD_FLASH_SECTOR_SIZE;
@@ -621,12 +672,12 @@ uint32_t flash_get_page_size(const flash_t *obj)
621672

622673
uint32_t flash_get_start_address(const flash_t *obj)
623674
{
624-
return BOARD_FLASHIAP_START_ADDR;
675+
return BOARD_FLASH_START_ADDR;
625676
}
626677

627678
uint32_t flash_get_size(const flash_t *obj)
628679
{
629-
return BOARD_FLASHIAP_SIZE;
680+
return BOARD_FLASH_SIZE;
630681
}
631682

632683
uint8_t flash_get_erase_value(const flash_t *obj)

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