Skip to content

Commit a465e0c

Browse files
JojoS62JojoS62
committed
add basic target files and cmakelists
1 parent 0553c11 commit a465e0c

File tree

7 files changed

+353
-3
lines changed

7 files changed

+353
-3
lines changed

‎targets/TARGET_NXP/TARGET_LPC176X/CMakeLists.txt‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33

44
add_subdirectory(TARGET_ARCH_PRO EXCLUDE_FROM_ALL)
55
add_subdirectory(TARGET_MBED_LPC1768 EXCLUDE_FROM_ALL)
6+
add_subdirectory(TARGET_LPCXPRESSO_LPC1769 EXCLUDE_FROM_ALL)
67

78
add_library(mbed-lpc176x INTERFACE)
89

@@ -49,3 +50,4 @@ target_link_libraries(mbed-lpc176x INTERFACE mbed-nxp)
4950

5051
mbed_set_linker_script(mbed-arch-pro ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
5152
mbed_set_linker_script(mbed-lpc1768 ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
53+
mbed_set_linker_script(mbed-lpcxpresso-lpc1769 ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})

‎targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/CMakeLists.txt‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
# Copyright (c) 2021 ARM Limited. All rights reserved.
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
include(mbed_set_post_build_nxp)
5+
6+
add_library(mbed-lpcxpresso-lpc1769 INTERFACE)
7+
8+
target_include_directories(mbed-lpcxpresso-lpc1769
9+
INTERFACE
10+
.
11+
)
12+
13+
target_link_libraries(mbed-lpcxpresso-lpc1769 INTERFACE mbed-lpc176x)
14+
15+
mbed_post_build_lpc_patch_vtable("LPC1768")

‎targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/PinNames.h‎

Lines changed: 150 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,150 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
* SPDX-License-Identifier: Apache-2.0
4+
*
5+
* Licensed under the Apache License, Version 2.0 (the "License");
6+
* you may not use this file except in compliance with the License.
7+
* You may obtain a copy of the License at
8+
*
9+
* http://www.apache.org/licenses/LICENSE-2.0
10+
*
11+
* Unless required by applicable law or agreed to in writing, software
12+
* distributed under the License is distributed on an "AS IS" BASIS,
13+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14+
* See the License for the specific language governing permissions and
15+
* limitations under the License.
16+
*/
17+
18+
/* MBED TARGET LIST: LPC1768 */
19+
20+
#ifndef MBED_PINNAMES_H
21+
#define MBED_PINNAMES_H
22+
23+
#include "cmsis.h"
24+
25+
#ifdef __cplusplus
26+
extern "C" {
27+
#endif
28+
29+
typedef enum {
30+
PIN_INPUT,
31+
PIN_OUTPUT
32+
} PinDirection;
33+
34+
/* If this macro is defined, you can use constexpr utility functions for pin map search. */
35+
#define STATIC_PINMAP_READY 1
36+
37+
#define PORT_SHIFT 5
38+
39+
typedef enum {
40+
// LPC Pin Names
41+
P0_0 = LPC_GPIO0_BASE,
42+
P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
43+
P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
44+
P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31,
45+
P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31,
46+
P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31,
47+
48+
// mbed DIP Pin Names
49+
p5 = P0_9,
50+
p6 = P0_8,
51+
p7 = P0_7,
52+
p8 = P0_6,
53+
p9 = P0_0,
54+
p10 = P0_1,
55+
p11 = P0_18,
56+
p12 = P0_17,
57+
p13 = P0_15,
58+
p14 = P0_16,
59+
p15 = P0_23,
60+
p16 = P0_24,
61+
p17 = P0_25,
62+
p18 = P0_26,
63+
p19 = P1_30,
64+
p20 = P1_31,
65+
p21 = P2_5,
66+
p22 = P2_4,
67+
p23 = P2_3,
68+
p24 = P2_2,
69+
p25 = P2_1,
70+
p26 = P2_0,
71+
p27 = P0_11,
72+
p28 = P0_10,
73+
p29 = P0_5,
74+
p30 = P0_4,
75+
76+
CONSOLE_TX = P0_2,
77+
CONSOLE_RX = P0_3,
78+
79+
// Arch Pro Pin Names
80+
D0 = P4_29,
81+
D1 = P4_28,
82+
D2 = P0_4,
83+
D3 = P0_5,
84+
D4 = P2_2,
85+
D5 = P2_3,
86+
D6 = P2_4,
87+
D7 = P2_5,
88+
D8 = P0_0,
89+
D9 = P0_1,
90+
D10 = P0_6,
91+
D11 = P0_9,
92+
D12 = P0_8,
93+
D13 = P0_7,
94+
D14 = P0_27,
95+
D15 = P0_28,
96+
97+
A0 = P0_23,
98+
A1 = P0_24,
99+
A2 = P0_25,
100+
A3 = P0_26,
101+
A4 = P1_30,
102+
A5 = P1_31,
103+
104+
// Not connected
105+
NC = (int)0xFFFFFFFF
106+
} PinName;
107+
108+
// Standard buttons and LEDs
109+
#define LED1 P0_22 // LED1 RGB red
110+
#define LED2 P3_26 // LED1 RGB blue
111+
#define LED3 P2_25 // LED1 RGB green
112+
113+
#define LED_RED LED1
114+
#define LED_BLUE LED2
115+
#define LED_GREEN LED3
116+
117+
// I2C pin names
118+
#define I2C_SCL0 P0_28 // ext. pull-up 2k2 onboard
119+
#define I2C_SDA0 P0_27 // ext. pull-up 2k2 onboard
120+
#define I2C_SCL1 p10
121+
#define I2C_SDA1 p9
122+
#define I2C_SCL2 P0_11
123+
#define I2C_SDA2 P0_10
124+
#define I2C_SCL I2C_SCL0
125+
#define I2C_SDA I2C_SDA0
126+
127+
typedef enum {
128+
PullUp = 0,
129+
PullDown = 3,
130+
PullNone = 2,
131+
Repeater = 1,
132+
OpenDrain = 4,
133+
PullDefault = PullDown
134+
} PinMode;
135+
136+
// version of PINCON_TypeDef using register arrays
137+
typedef struct {
138+
__IO uint32_t PINSEL[11];
139+
uint32_t RESERVED0[5];
140+
__IO uint32_t PINMODE[10];
141+
__IO uint32_t PINMODE_OD[5];
142+
} PINCONARRAY_TypeDef;
143+
144+
#define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE)
145+
146+
#ifdef __cplusplus
147+
}
148+
#endif
149+
150+
#endif

‎targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/device.h‎

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,41 @@
1+
// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
2+
// Check the 'features' section of the target description in 'targets.json' for more details.
3+
/* mbed Microcontroller Library
4+
* Copyright (c) 2006-2013 ARM Limited
5+
* SPDX-License-Identifier: Apache-2.0
6+
*
7+
* Licensed under the Apache License, Version 2.0 (the "License");
8+
* you may not use this file except in compliance with the License.
9+
* You may obtain a copy of the License at
10+
*
11+
* http://www.apache.org/licenses/LICENSE-2.0
12+
*
13+
* Unless required by applicable law or agreed to in writing, software
14+
* distributed under the License is distributed on an "AS IS" BASIS,
15+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16+
* See the License for the specific language governing permissions and
17+
* limitations under the License.
18+
*/
19+
#ifndef MBED_DEVICE_H
20+
#define MBED_DEVICE_H
21+
22+
23+
24+
25+
26+
27+
28+
29+
30+
31+
32+
#define DEVICE_ID_LENGTH 32
33+
#define DEVICE_MAC_OFFSET 20
34+
35+
36+
37+
38+
39+
#include "objects.h"
40+
41+
#endif

‎targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/reserved_pins.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
// List of reserved pins for MBED LPC1768
2+
3+
#ifndef RESERVED_PINS_H
4+
#define RESERVED_PINS_H
5+
6+
#define TARGET_RESERVED_PINS {}
7+
8+
#endif

‎targets/targets.json5‎

Lines changed: 89 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -494,6 +494,92 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
494494
},
495495
"image_url": "https://os.mbed.com/media/cache/platforms/LPC1768.jpg.250x250_q85.jpg"
496496
},
497+
"MCU_LPC176X": {
498+
"inherits": [
499+
"LPCTarget"
500+
],
501+
"public": false,
502+
"core": "Cortex-M3",
503+
"extra_labels": [
504+
"NXP",
505+
"LPC176X",
506+
"NXP_EMAC"
507+
],
508+
"supported_toolchains": [
509+
"GCC_ARM"
510+
],
511+
"macros": [
512+
"MBED_SPLIT_HEAP"
513+
],
514+
"device_has": [
515+
"RTC",
516+
"USTICKER",
517+
"ANALOGIN",
518+
"ANALOGOUT",
519+
"CAN",
520+
"DEBUG_AWARENESS",
521+
"EMAC",
522+
"I2C",
523+
"I2CSLAVE",
524+
"INTERRUPTIN",
525+
"PORTIN",
526+
"PORTINOUT",
527+
"PORTOUT",
528+
"PWMOUT",
529+
"SERIAL",
530+
"SERIAL_FC",
531+
"SLEEP",
532+
"SPI",
533+
"SPISLAVE",
534+
"FLASH",
535+
"MPU",
536+
"USBDEVICE",
537+
"WATCHDOG",
538+
"RESET_REASON"
539+
],
540+
"release_versions": [
541+
"5"
542+
],
543+
"device_name": "LPC1768",
544+
"bootloader_supported": true,
545+
"config": {
546+
"us-ticker-timer": {
547+
"help": "Chooses which timer (0-3) to use for us_ticker.c",
548+
"value": 3
549+
}
550+
},
551+
"overrides": {
552+
"network-default-interface-type": "ETHERNET",
553+
},
554+
"supported_c_libs": {
555+
"arm": [
556+
"std", "small"
557+
],
558+
"gcc_arm": [
559+
"std", "small"
560+
]
561+
},
562+
"supported_application_profiles": [
563+
"full", "bare-metal"
564+
],
565+
"is_mcu_family_target": true
566+
},
567+
"LPCXPRESSO_LPC1769": {
568+
"inherits": [
569+
"MCU_LPC176X"
570+
],
571+
"core": "Cortex-M3",
572+
"extra_labels_add": [
573+
"MBED_LPC1768",
574+
],
575+
"components_add": [
576+
"LOCALFILESYSTEM"
577+
],
578+
"overrides": {
579+
"default-adc-vref": 3.3 // Vref is 3.3V
580+
},
581+
"image_url": "https://www.embeddedartists.com/wp-content/uploads/2018/06/lpc1769_xpr_540x333-540x333.png"
582+
},
497583
"ARCH_PRO": {
498584
"supported_form_factors": [
499585
"ARDUINO"
@@ -3060,7 +3146,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
30603146
"STM32G4A1xx"
30613147
]
30623148
},
3063-
3149+
30643150
// STM32H5 Targets -------------------------------------------------------------------------------------------------
30653151
"MCU_STM32H5": {
30663152
"inherits": [
@@ -3189,7 +3275,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
31893275
"device_name": "STM32H563ZITx",
31903276
"image_url": "https://www.st.com/bin/ecommerce/api/image.PF274337.en.feature-description-include-personalized-no-cpn-medium.jpg"
31913277
},
3192-
3278+
31933279
// STM32H7 Targets -------------------------------------------------------------------------------------------------
31943280
"MCU_STM32H7": {
31953281
"inherits": [
@@ -3431,7 +3517,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
34313517
],
34323518
"device_name": "STM32H745ZITx"
34333519
},
3434-
3520+
34353521
// These targets contain the extra bits to add to the MCU_STM32H745xI target to set it for the
34363522
// CM4 or CM7 core.
34373523
"MCU_STM32H745xI_CM4": {

‎targets/upload_method_cfg/LPCXPRESSO_LPC1769.cmake‎

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
# Mbed OS upload method configuration file for target Embedded Artists LPCXPRESSO_LPC1768.
2+
# To change any of these parameters from their default values, set them in your build script between where you
3+
# include app.cmake and where you add mbed os as a subdirectory.
4+
5+
# Notes:
6+
# 1. LPC1768 is supposed to be supported by LinkServer, and I am able to get through flashing it, but it errors out at the end.
7+
8+
# General config parameters
9+
# -------------------------------------------------------------
10+
set(UPLOAD_METHOD_DEFAULT PYOCD)
11+
12+
# Config options for MBED
13+
# -------------------------------------------------------------
14+
15+
set(MBED_UPLOAD_ENABLED TRUE)
16+
set(MBED_RESET_BAUDRATE 115200)
17+
18+
# Config options for PYOCD
19+
# -------------------------------------------------------------
20+
21+
# Recent PyOCD (>= 0.11) does not appear to be able to talk to LPC1768
22+
# https://github.com/pyocd/pyOCD/issues/745
23+
# https://github.com/pyocd/pyOCD/issues/1124
24+
25+
set(PYOCD_UPLOAD_ENABLED TRUE)
26+
set(PYOCD_TARGET_NAME LPC1768)
27+
set(PYOCD_CLOCK_SPEED 4000k)
28+
29+
# Config options for OPENOCD
30+
# -------------------------------------------------------------
31+
32+
# One note about OpenOCD for LPC176:
33+
# If you issue a "monitor reset" command, GDB will think that the program is halted, but it actually will have
34+
# resumed. So, issue a "c" command after "monitor reset" to get things synchronized again.
35+
36+
set(OPENOCD_UPLOAD_ENABLED TRUE)
37+
set(OPENOCD_CHIP_CONFIG_COMMANDS
38+
-f ${CMAKE_CURRENT_LIST_DIR}/openocd_cfgs/lpc1768.cfg)
39+
40+
# For some reason, as of summer 2024, git version of OpenOCD does not work with LPC1768. So, it seems like
41+
# the last compatible version will be the current release 0.12.
42+
set(OPENOCD_VERSION_RANGE 0.10...<0.13)
43+
44+
# Config options for LINKSERVER
45+
# -------------------------------------------------------------
46+
set(LINKSERVER_UPLOAD_ENABLED TRUE)
47+
set(LINKSERVER_DEVICE LPC1769)
48+

0 commit comments

Comments
 (0)