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lines changed Original file line number Diff line number Diff line change @@ -480222,6 +480222,74 @@
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]
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],
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"sub_family": "STM32WL55"
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+ },
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+ "STM32WLE5JCIx": {
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+ "name": "STM32WLE5JCIx:CM4",
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+ "memories": {
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+ "IRAM1": {
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+ "access": {
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+ "read": true,
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+ "write": true,
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+ "execute": false,
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+ "peripheral": false,
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+ "secure": false,
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+ "non_secure": false,
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+ "non_secure_callable": false
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+ },
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+ "start": 536870912,
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+ "size": 65536,
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+ "startup": false,
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+ "default": true
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+ },
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+ "IROM1": {
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+ "access": {
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+ "read": true,
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+ "write": false,
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+ "execute": true,
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+ "peripheral": false,
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+ "secure": false,
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+ "non_secure": false,
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+ "non_secure_callable": false
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+ },
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+ "start": 134217728,
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+ "size": 262144,
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+ "startup": true,
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+ "default": true
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+ }
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+ },
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+ "algorithms": [
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+ {
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+ "file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM",
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+ "start": 134217728,
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+ "size": 262144,
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+ "default": true,
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+ "ram_start": null,
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+ "ram_size": null
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+ }
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+ ],
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+ "processor": {
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+ "Symmetric": {
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+ "units": 1,
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+ "core": "CortexM4",
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+ "fpu": "None",
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+ "mpu": "Present"
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+ }
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+ },
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+ "from_pack": {
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+ "vendor": "Keil",
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+ "pack": "STM32WLxx_DFP",
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+ "version": "1.0.0",
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+ "url": "http://www.keil.com/pack"
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+ },
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+ "vendor": "STMicroelectronics:13",
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+ "family": "STM32WL Series",
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+ "sectors": [
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+ [
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+ 134217728,
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+ 2048
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+ ]
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+ ],
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+ "sub_family": "STM32WLE5"
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},
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"STM32WB15CCUx": {
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"name": "STM32WB15CCUx",
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