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author
Jan Kamidra
committed
add additional APIs
1 parent d703fbd commit cb5c3a1

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7 files changed

+267
-18
lines changed

7 files changed

+267
-18
lines changed

targets/TARGET_STM/TARGET_STM32U0/clock_cfg/system_clock.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,8 @@ uint8_t SetSysClock_PLL_HSI(void)
102102
/** Initializes the RCC Oscillators according to the specified parameters
103103
* in the RCC_OscInitTypeDef structure.
104104
*/
105-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_MSI;
105+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI48;
106+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
106107
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
107108
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
108109
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -134,7 +135,7 @@ uint8_t SetSysClock_PLL_HSI(void)
134135
#if DEVICE_USBDEVICE
135136
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
136137
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
137-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI;
138+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
138139
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
139140
return 0; // FAIL
140141
}
Lines changed: 254 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,254 @@
1+
/* mbed Microcontroller Library
2+
* SPDX-License-Identifier: BSD-3-Clause
3+
******************************************************************************
4+
*
5+
* Copyright (c) 2015-2021 STMicroelectronics.
6+
* All rights reserved.
7+
*
8+
* This software component is licensed by ST under BSD 3-Clause license,
9+
* the "License"; You may not use this file except in compliance with the
10+
* License. You may obtain a copy of the License at:
11+
* opensource.org/licenses/BSD-3-Clause
12+
*
13+
******************************************************************************
14+
*/
15+
16+
#include "flash_api.h"
17+
#include "platform/mbed_critical.h"
18+
19+
#if DEVICE_FLASH
20+
21+
/**
22+
* @brief Gets the page of a given address
23+
* @param Addr: Address of the FLASH Memory
24+
* @retval The page of a given address
25+
*/
26+
static uint32_t GetPage(uint32_t Addr)
27+
{
28+
uint32_t page = 0;
29+
30+
if (Addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
31+
/* Bank 1 */
32+
page = (Addr - FLASH_BASE) / FLASH_PAGE_SIZE;
33+
} else {
34+
/* Bank 2 */
35+
page = (Addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
36+
}
37+
38+
return page;
39+
}
40+
41+
/**
42+
* @brief Gets the bank of a given address
43+
* @param Addr: Address of the FLASH Memory
44+
* @retval The bank of a given address
45+
*/
46+
static uint32_t GetBank(uint32_t Addr)
47+
{
48+
uint32_t bank = 0;
49+
50+
if (Addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
51+
bank = FLASH_BANK_1;
52+
} else {
53+
bank = FLASH_BANK_2;
54+
}
55+
56+
return bank;
57+
}
58+
59+
/** Initialize the flash peripheral and the flash_t object
60+
*
61+
* @param obj The flash object
62+
* @return 0 for success, -1 for error
63+
*/
64+
int32_t flash_init(flash_t *obj)
65+
{
66+
return 0;
67+
}
68+
69+
/** Uninitialize the flash peripheral and the flash_t object
70+
*
71+
* @param obj The flash object
72+
* @return 0 for success, -1 for error
73+
*/
74+
int32_t flash_free(flash_t *obj)
75+
{
76+
return 0;
77+
}
78+
79+
/** Erase one sector starting at defined address
80+
*
81+
* The address should be at sector boundary. This function does not do any check for address alignments
82+
* @param obj The flash object
83+
* @param address The sector starting address
84+
* @return 0 for success, -1 for error
85+
*/
86+
int32_t flash_erase_sector(flash_t *obj, uint32_t address)
87+
{
88+
uint32_t FirstPage = 0, BankNumber = 0;
89+
uint32_t PAGEError = 0;
90+
FLASH_EraseInitTypeDef EraseInitStruct;
91+
92+
if ((address >= (flash_get_start_address(obj) + flash_get_size(obj))) || (address < flash_get_start_address(obj))) {
93+
return -1;
94+
}
95+
96+
if (HAL_ICACHE_Disable() != HAL_OK)
97+
{
98+
return -1;
99+
}
100+
101+
if (HAL_FLASH_Unlock() != HAL_OK) {
102+
return -1;
103+
}
104+
105+
core_util_critical_section_enter();
106+
107+
/* Clear error programming flags */
108+
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
109+
110+
/* Get the 1st page to erase */
111+
FirstPage = GetPage(address);
112+
/* MBED HAL erases 1 page / sector at a time */
113+
/* Get the bank */
114+
BankNumber = GetBank(address);
115+
116+
/* Fill EraseInit structure*/
117+
EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
118+
EraseInitStruct.Banks = BankNumber;
119+
EraseInitStruct.Page = FirstPage;
120+
EraseInitStruct.NbPages = 1;
121+
122+
if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) {
123+
return -1;
124+
}
125+
126+
core_util_critical_section_exit();
127+
128+
if (HAL_FLASH_Lock() != HAL_OK) {
129+
return -1;
130+
}
131+
132+
if (HAL_ICACHE_Enable() != HAL_OK)
133+
{
134+
return -1;
135+
}
136+
137+
return 0;
138+
}
139+
140+
/** Program one page starting at defined address
141+
*
142+
* The page should be at page boundary, should not cross multiple sectors.
143+
* This function does not do any check for address alignments or if size
144+
* is aligned to a page size.
145+
* @param obj The flash object
146+
* @param address The sector starting address
147+
* @param data The data buffer to be programmed
148+
* @param size The number of bytes to program
149+
* @return 0 for success, -1 for error
150+
*/
151+
int32_t flash_program_page(flash_t *obj, uint32_t address,
152+
const uint8_t *data, uint32_t size)
153+
{
154+
uint32_t StartAddress = 0;
155+
int32_t status = 0;
156+
157+
if ((address >= (flash_get_start_address(obj) + flash_get_size(obj))) || (address < flash_get_start_address(obj))) {
158+
return -1;
159+
}
160+
161+
if ((size % flash_get_page_size(obj)) != 0) {
162+
return -1;
163+
}
164+
165+
if (HAL_ICACHE_Disable() != HAL_OK)
166+
{
167+
return -1;
168+
}
169+
170+
if (HAL_FLASH_Unlock() != HAL_OK) {
171+
return -1;
172+
}
173+
174+
/* Clear error programming flags */
175+
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
176+
177+
/* Program the user Flash area word by word */
178+
StartAddress = address;
179+
180+
while ((address < (StartAddress + size)) && (status == 0)) {
181+
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_QUADWORD, address, ((uint32_t) data)) == HAL_OK) {
182+
address = address + 16;
183+
data = data + 16;
184+
} else {
185+
status = -1;
186+
}
187+
}
188+
189+
if (HAL_FLASH_Unlock() != HAL_OK) {
190+
return -1;
191+
}
192+
193+
if (HAL_ICACHE_Enable() != HAL_OK)
194+
{
195+
return -1;
196+
}
197+
198+
return status;
199+
}
200+
201+
/** Get sector size
202+
*
203+
* @param obj The flash object
204+
* @param address The sector starting address
205+
* @return The size of a sector
206+
*/
207+
uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
208+
{
209+
if ((address >= (flash_get_start_address(obj) + flash_get_size(obj))) || (address < flash_get_start_address(obj))) {
210+
return MBED_FLASH_INVALID_SIZE;
211+
} else {
212+
return FLASH_PAGE_SIZE;
213+
}
214+
}
215+
216+
/** Get page size
217+
*
218+
* @param obj The flash object
219+
* @return The size of a page
220+
*/
221+
uint32_t flash_get_page_size(const flash_t *obj)
222+
{
223+
/* The Flash memory is programmed 137 bits at a time (128-bit data + 9 bits ECC). */
224+
return 16;
225+
}
226+
227+
/** Get start address for the flash region
228+
*
229+
* @param obj The flash object
230+
* @return The start address for the flash region
231+
*/
232+
uint32_t flash_get_start_address(const flash_t *obj)
233+
{
234+
return FLASH_BASE;
235+
}
236+
237+
/** Get the flash region size
238+
*
239+
* @param obj The flash object
240+
* @return The flash region size
241+
*/
242+
uint32_t flash_get_size(const flash_t *obj)
243+
{
244+
return FLASH_SIZE;
245+
}
246+
247+
uint8_t flash_get_erase_value(const flash_t *obj)
248+
{
249+
(void)obj;
250+
251+
return 0xFF;
252+
}
253+
254+
#endif

targets/TARGET_STM/TARGET_STM32U0/objects.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ struct flash_s {
9393
uint32_t dummy;
9494
};
9595

96-
//#define HAL_CRC_IS_SUPPORTED(polynomial, width) ((width) == 7 || (width) == 8 || (width) == 16 || (width) == 32)
96+
#define HAL_CRC_IS_SUPPORTED(polynomial, width) ((width) == 7 || (width) == 8 || (width) == 16 || (width) == 32)
9797

9898
/* rtc_api.c */
9999
//#define __HAL_RCC_PWR_CLK_ENABLE()

targets/TARGET_STM/lp_ticker.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@
112112
#define RCC_LPTIMCLKSOURCE_LSE RCC_LPTIM1CLKSOURCE_LSE
113113
#define RCC_LPTIMCLKSOURCE_LSI RCC_LPTIM1CLKSOURCE_LSI
114114

115-
#if defined(STM32G051xx) || defined(STM32G061xx) || defined(STM32G071xx) || defined(STM32G081xx) || defined(STM32G0B1xx) || defined(STM32G0C1xx)
115+
#if defined(STM32G051xx) || defined(STM32G061xx) || defined(STM32G071xx) || defined(STM32G081xx) || defined(STM32G0B1xx) || defined(STM32G0C1xx) || defined(STM32U0)
116116
#define LPTIM_MST_IRQ TIM6_DAC_LPTIM1_IRQn
117117
#else // STM32G0xx
118118
#define LPTIM_MST_IRQ LPTIM1_IRQn

targets/TARGET_STM/trng_api.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ void trng_init(trng_t *obj)
8888
}
8989
}
9090

91-
#elif defined(TARGET_STM32G4)
91+
#elif defined(TARGET_STM32G4) || defined(TARGET_STM32U0)
9292
/* RNG and USB clocks have the same HSI48 source which has been enabled in SetSysClock */
9393
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
9494

targets/TARGET_STM/watchdog_api.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ watchdog_features_t hal_watchdog_get_platform_features(void)
139139
features.clock_max_frequency = 50000;
140140
#elif defined(STM32H7) || defined(STM32L4) || defined(STM32U5)
141141
features.clock_max_frequency = 33600;
142-
#elif defined(STM32G0) || defined(STM32L5) || defined(STM32G4) || defined(STM32WB) || defined(STM32WL)
142+
#elif defined(STM32G0) || defined(STM32L5) || defined(STM32G4) || defined(STM32WB) || defined(STM32WL) || defined(STM32U0)
143143
features.clock_max_frequency = 34000;
144144
#else
145145
#error "unsupported target"

targets/targets.json5

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4777,7 +4777,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
47774777
},
47784778
"lpticker_lptim": {
47794779
"help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
4780-
"value": 0
4780+
"value": 1
47814781
},
47824782
"i2c_timing_value_algo": {
47834783
"help": "If value was set to true I2C timing algorithm is enabled. Enabling may leads to performance issue. Keeping this false and changing system clock will trigger assert.)",
@@ -4789,11 +4789,11 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
47894789
//"lpuart_clock_source": "USE_LPUART_CLK_HSI|USE_LPUART_CLK_SYSCLK"
47904790
},
47914791
"device_has_add": [
4792-
// "CRC",
4793-
// "FLASH",
4792+
"CRC",
4793+
"FLASH",
47944794
"MPU",
47954795
"ANALOGOUT",
4796-
// "TRNG"
4796+
"TRNG"
47974797
],
47984798
"is_mcu_family_target": true
47994799
},
@@ -4814,23 +4814,17 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
48144814
"MCU_STM32U083xC"
48154815
],
48164816
"overrides": {
4817-
"lse_available": 0,
4817+
"lse_available": 1,
48184818
"clock_source": "USE_PLL_HSI",
48194819
},
48204820
"device_has_remove": [
4821-
"LPTICKER",
4822-
"RTC",
48234821
"I2C",
48244822
"I2CSLAVE",
48254823
"I2C_ASYNCH",
4826-
//"PWMOUT",
48274824
"SERIAL_FC",
4828-
"SLEEP",
48294825
"SPI",
48304826
"SPISLAVE",
4831-
"SPI_ASYNCH",
4832-
"WATCHDOG",
4833-
"RESET_REASON"
4827+
"SPI_ASYNCH"
48344828
],
48354829
"supported_form_factors": [
48364830
"ARDUINO_UNO"

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