Skip to content

Commit d5d76c9

Browse files
Jamie SmithVictorWTang
andauthored
Apply suggestions from code review
Co-authored-by: VictorWTang <[email protected]>
1 parent 3d9a069 commit d5d76c9

File tree

1 file changed

+7
-7
lines changed

1 file changed

+7
-7
lines changed

tools/python/memap/memap.py

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -79,17 +79,17 @@
7979

8080
@dataclasses.dataclass
8181
class MemoryBankInfo:
82-
# Name of the bank, from cmsis_mcu_descriptions.json
8382
name: str
83+
"""Name of the bank, from cmsis_mcu_descriptions.json"""
8484

85-
# Start address of memory bank
8685
start_addr: int
86+
"""Start address of memory bank"""
8787

88-
# Total size of the memory bank in bytes
8988
total_size: int
89+
"""Total size of the memory bank in bytes"""
9090

91-
# Size used in the memory bank in bytes (sum of the sizes of all symbols)
9291
used_size: int = 0
92+
"""Size used in the memory bank in bytes (sum of the sizes of all symbols)"""
9393

9494
def contains_addr(self, addr: int) -> bool:
9595
"""
@@ -108,11 +108,11 @@ class _Parser(ABC):
108108
'.stabstr', '.ARM.exidx', '.ARM')
109109

110110
def __init__(self):
111-
# Dict of object name to {section name, size}
112111
self.modules: dict[str, dict[str, int]] = {}
112+
"""Dict of object name to {section name, size}"""
113113

114-
# Memory bank info, by type (RAM/ROM)
115114
self.memory_banks: dict[str, list[MemoryBankInfo]] = {"RAM": [], "ROM": []}
115+
"""Memory bank info, by type (RAM/ROM)"""
116116

117117
def _add_symbol_to_memory_banks(self, symbol_name: str, start_addr: int, size: int) -> None:
118118
"""
@@ -124,7 +124,7 @@ def _add_symbol_to_memory_banks(self, symbol_name: str, start_addr: int, size: i
124124
return
125125

126126
end_addr = start_addr + size
127-
for bank_type, banks in self.memory_banks.items():
127+
for banks in self.memory_banks.values():
128128
for bank_info in banks:
129129
if bank_info.contains_addr(start_addr):
130130
if bank_info.contains_addr(end_addr):

0 commit comments

Comments
 (0)