Skip to content

Commit dca1d5c

Browse files
author
Martin Kojtal
committed
cmsis: fix armcc compat header redefition of enable/disable irq
The fix will be in the 5.8.1 CMSIS, we cherry-pick it to our imported version. See ARM-software/CMSIS_5@e797cca
1 parent 00580ce commit dca1d5c

File tree

1 file changed

+4
-0
lines changed

1 file changed

+4
-0
lines changed

cmsis/CMSIS_5/CMSIS/TARGET_CORTEX_A/Include/cmsis_armclang.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -373,20 +373,24 @@ __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
373373
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
374374
Can only be executed in Privileged modes.
375375
*/
376+
#ifndef __ARM_COMPAT_H
376377
__STATIC_FORCEINLINE void __enable_irq(void)
377378
{
378379
__ASM volatile ("cpsie i" : : : "memory");
379380
}
381+
#endif
380382

381383
/**
382384
\brief Disable IRQ Interrupts
383385
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
384386
Can only be executed in Privileged modes.
385387
*/
388+
#ifndef __ARM_COMPAT_H
386389
__STATIC_FORCEINLINE void __disable_irq(void)
387390
{
388391
__ASM volatile ("cpsid i" : : : "memory");
389392
}
393+
#endif
390394

391395
/**
392396
\brief Enable FIQ

0 commit comments

Comments
 (0)