From a5b8cb31c72c7b41928f17bc56834a80bfed4437 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Thu, 11 Apr 2024 22:11:34 -0700 Subject: [PATCH 01/16] Start on Arduino Giga --- connectivity/lwipstack/mbed_lib.json5 | 2 +- .../TARGET_ARDUINO_NICLA_SENSE_ME/device.h | 24 +- .../TARGET_STM32H747_ARDUINO/CMakeLists.txt | 3 +- .../TARGET_ARDUINO_GIGA/CMakeLists.txt | 8 + .../TARGET_ARDUINO_GIGA/PinNames.h | 445 ++++++++++++++++++ targets/targets.json5 | 33 ++ .../upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 53 +++ .../openocd_cfgs/stm32h747.cfg | 12 + 8 files changed, 577 insertions(+), 3 deletions(-) create mode 100644 targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/CMakeLists.txt create mode 100644 targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/PinNames.h create mode 100644 targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake create mode 100644 targets/upload_method_cfg/openocd_cfgs/stm32h747.cfg diff --git a/connectivity/lwipstack/mbed_lib.json5 b/connectivity/lwipstack/mbed_lib.json5 index 0de4f1750a2..cce53b213e2 100644 --- a/connectivity/lwipstack/mbed_lib.json5 +++ b/connectivity/lwipstack/mbed_lib.json5 @@ -199,7 +199,7 @@ "MIMXRT105X": { "mem-size": 36560 }, - "PORTENTA_H7": { + "STM32H747_ARDUINO": { "mem-size": 16000 }, "FVP_MPS2_M3": { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h index 4ffd3337994..ee047587421 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h @@ -1,5 +1,8 @@ /* mbed Microcontroller Library * Copyright (c) 2006-2013 ARM Limited +======= +/* + * Copyright 2024 Arduino SA * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -19,4 +22,23 @@ #include "objects.h" -#endif \ No newline at end of file +#endif +======= +#include "cyhal_system.h" + +#include "mbed_critical.h" + +uint32_t cyhal_system_critical_section_enter(void) +{ + bool were_interrupts_enabled = !core_util_in_critical_section(); + + core_util_critical_section_enter(); + + return were_interrupts_enabled; +} + +void cyhal_system_critical_section_exit(uint32_t old_state) +{ + (void)old_state; + core_util_critical_section_exit(); +} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/CMakeLists.txt index 53b14507191..28947102162 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/CMakeLists.txt @@ -8,4 +8,5 @@ target_link_libraries(mbed-stm32h747-arduino INTERFACE mbed-stm32h747xi-cm7) target_sources(mbed-stm32h747-arduino INTERFACE PeripheralPins.c) -add_subdirectory(TARGET_ARDUINO_PORTENTA_H7) \ No newline at end of file +add_subdirectory(TARGET_ARDUINO_PORTENTA_H7) +add_subdirectory(TARGET_ARDUINO_GIGA) diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/CMakeLists.txt new file mode 100644 index 00000000000..f01edcf7687 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/CMakeLists.txt @@ -0,0 +1,8 @@ +add_library(mbed-arduino-giga-cm7 INTERFACE) + +target_include_directories(mbed-arduino-giga-cm7 + INTERFACE + . +) + +target_link_libraries(mbed-arduino-giga-cm7 INTERFACE mbed-stm32h747-arduino) \ No newline at end of file diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/PinNames.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/PinNames.h new file mode 100644 index 00000000000..0ca8f7cb1fd --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_STM32H747_ARDUINO/TARGET_ARDUINO_GIGA/PinNames.h @@ -0,0 +1,445 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * Copyright (c) 2020, Arduino SA + * + * SPDX-License-Identifier: BSD-3-Clause + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +/* MBED TARGET LIST: GIGA */ + +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" +#include "PinNamesTypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define DUAL_PAD 0xF00 + +typedef enum { + ALT0 = 0x100, + ALT1 = 0x200, + ALT2 = 0x300, + ALT3 = 0x400, + ALT4 = 0x500, +} ALTx; + +typedef enum { + PA_0 = 0x00, + PA_0C = PA_0 | DUAL_PAD, // dual pad + PA_0C_ALT0 = PA_0C | ALT0, // same pin used for alternate HW + PA_0C_ALT1 = PA_0C | ALT1, // same pin used for alternate HW + PA_0C_ALT2 = PA_0C | ALT2, // same pin used for alternate HW + PA_1 = 0x01, + PA_1C = PA_1 | DUAL_PAD, // dual pad + PA_1C_ALT0 = PA_1C | ALT0, // same pin used for alternate HW + PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW + PA_2 = 0x02, + PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW + PA_3 = 0x03, + PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW + PA_4 = 0x04, + PA_4_ALT0 = PA_4 | ALT0, // same pin used for alternate HW + PA_4_ALT1 = PA_4 | ALT1, // same pin used for alternate HW + PA_5 = 0x05, + PA_5_ALT0 = PA_5 | ALT0, // same pin used for alternate HW + PA_5_ALT1 = PA_5 | ALT1, // same pin used for alternate HW + PA_5_ALT2 = PA_5 | ALT2, // same pin used for alternate HW + PA_6 = 0x06, + PA_6_ALT0 = PA_6 | ALT0, // same pin used for alternate HW + PA_7 = 0x07, + PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW + PA_7_ALT1 = PA_7 | ALT1, // same pin used for alternate HW + PA_7_ALT2 = PA_7 | ALT2, // same pin used for alternate HW + PA_8 = 0x08, + PA_9 = 0x09, + PA_9_ALT0 = PA_9 | ALT0, // same pin used for alternate HW + PA_10 = 0x0A, + PA_10_ALT0 = PA_10 | ALT0, // same pin used for alternate HW + PA_11 = 0x0B, + PA_11_ALT0 = PA_11 | ALT0, // same pin used for alternate HW + PA_12 = 0x0C, + PA_12_ALT0 = PA_12 | ALT0, // same pin used for alternate HW + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, + PA_15_ALT0 = PA_15 | ALT0, // same pin used for alternate HW + PA_15_ALT1 = PA_15 | ALT1, // same pin used for alternate HW + PB_0 = 0x10, + PB_0_ALT0 = PB_0 | ALT0, // same pin used for alternate HW + PB_0_ALT1 = PB_0 | ALT1, // same pin used for alternate HW + PB_0_ALT2 = PB_0 | ALT2, // same pin used for alternate HW + PB_1 = 0x11, + PB_1_ALT0 = PB_1 | ALT0, // same pin used for alternate HW + PB_1_ALT1 = PB_1 | ALT1, // same pin used for alternate HW + PB_2 = 0x12, + PB_3 = 0x13, + PB_3_ALT0 = PB_3 | ALT0, // same pin used for alternate HW + PB_3_ALT1 = PB_3 | ALT1, // same pin used for alternate HW + PB_4 = 0x14, + PB_4_ALT0 = PB_4 | ALT0, // same pin used for alternate HW + PB_4_ALT1 = PB_4 | ALT1, // same pin used for alternate HW + PB_5 = 0x15, + PB_5_ALT0 = PB_5 | ALT0, // same pin used for alternate HW + PB_5_ALT1 = PB_5 | ALT1, // same pin used for alternate HW + PB_6 = 0x16, + PB_6_ALT0 = PB_6 | ALT0, // same pin used for alternate HW + PB_6_ALT1 = PB_6 | ALT1, // same pin used for alternate HW + PB_7 = 0x17, + PB_7_ALT0 = PB_7 | ALT0, // same pin used for alternate HW + PB_8 = 0x18, + PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW + PB_9 = 0x19, + PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW + PB_10 = 0x1A, + PB_11 = 0x1B, + PB_12 = 0x1C, + PB_13 = 0x1D, + PB_14 = 0x1E, + PB_14_ALT0 = PB_14 | ALT0, // same pin used for alternate HW + PB_14_ALT1 = PB_14 | ALT1, // same pin used for alternate HW + PB_15 = 0x1F, + PB_15_ALT0 = PB_15 | ALT0, // same pin used for alternate HW + PB_15_ALT1 = PB_15 | ALT1, // same pin used for alternate HW + PC_0 = 0x20, + PC_0_ALT0 = PC_0 | ALT0, // same pin used for alternate HW + PC_0_ALT1 = PC_0 | ALT1, // same pin used for alternate HW + PC_1 = 0x21, + PC_1_ALT0 = PC_1 | ALT0, // same pin used for alternate HW + PC_1_ALT1 = PC_1 | ALT1, // same pin used for alternate HW + PC_1_ALT2 = PC_1 | ALT2, // same pin used for alternate HW + PC_1_ALT3 = PC_1 | ALT3, // same pin used for alternate HW + PC_1_ALT4 = PC_1 | ALT4, // same pin used for alternate HW + PC_2 = 0x22, + PC_2C = PC_2 | DUAL_PAD, // dual pad + PC_2C_ALT0 = PC_2C | ALT0, // same pin used for alternate HW + PC_2_ALT0 = PC_2 | ALT0, // same pin used for alternate HW + PC_2_ALT1 = PC_2 | ALT1, // same pin used for alternate HW + PC_2_ALT2 = PC_2 | ALT2, // same pin used for alternate HW + PC_2_ALT3 = PC_2 | ALT3, // same pin used for alternate HW + PC_2_ALT4 = PC_2 | ALT4, // same pin used for alternate HW + PC_3 = 0x23, + PC_3C = PC_3 | DUAL_PAD, // dual pad + PC_3_ALT0 = PC_3 | ALT0, // same pin used for alternate HW + PC_3_ALT1 = PC_3 | ALT1, // same pin used for alternate HW + PC_3_ALT2 = PC_3 | ALT2, // same pin used for alternate HW + PC_4 = 0x24, + PC_4_ALT0 = PC_4 | ALT0, // same pin used for alternate HW + PC_5 = 0x25, + PC_5_ALT0 = PC_5 | ALT0, // same pin used for alternate HW + PC_5_ALT1 = PC_5 | ALT1, // same pin used for alternate HW + PC_5_ALT2 = PC_5 | ALT2, // same pin used for alternate HW + PC_6 = 0x26, + PC_6_ALT0 = PC_6 | ALT0, // same pin used for alternate HW + PC_7 = 0x27, + PC_7_ALT0 = PC_7 | ALT0, // same pin used for alternate HW + PC_8 = 0x28, + PC_8_ALT0 = PC_8 | ALT0, // same pin used for alternate HW + PC_9 = 0x29, + PC_9_ALT0 = PC_9 | ALT0, // same pin used for alternate HW + PC_10 = 0x2A, + PC_10_ALT0 = PC_10 | ALT0, // same pin used for alternate HW + PC_11 = 0x2B, + PC_11_ALT0 = PC_11 | ALT0, // same pin used for alternate HW + PC_12 = 0x2C, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, + PD_0 = 0x30, + PD_1 = 0x31, + PD_2 = 0x32, + PD_3 = 0x33, + PD_4 = 0x34, + PD_5 = 0x35, + PD_6 = 0x36, + PD_7 = 0x37, + PD_8 = 0x38, + PD_9 = 0x39, + PD_10 = 0x3A, + PD_11 = 0x3B, + PD_12 = 0x3C, + PD_13 = 0x3D, + PD_14 = 0x3E, + PD_15 = 0x3F, + PE_0 = 0x40, + PE_1 = 0x41, + PE_2 = 0x42, + PE_3 = 0x43, + PE_4 = 0x44, + PE_5 = 0x45, + PE_6 = 0x46, + PE_7 = 0x47, + PE_8 = 0x48, + PE_9 = 0x49, + PE_10 = 0x4A, + PE_11 = 0x4B, + PE_12 = 0x4C, + PE_13 = 0x4D, + PE_14 = 0x4E, + PE_15 = 0x4F, + PF_0 = 0x50, + PF_1 = 0x51, + PF_2 = 0x52, + PF_3 = 0x53, + PF_4 = 0x54, + PF_4_ALT0 = PF_4 | ALT0, // same pin used for alternate HW + PF_5 = 0x55, + PF_6 = 0x56, + PF_6_ALT0 = PF_6 | ALT0, // same pin used for alternate HW + PF_7 = 0x57, + PF_8 = 0x58, + PF_8_ALT0 = PF_8 | ALT0, // same pin used for alternate HW + PF_9 = 0x59, + PF_9_ALT0 = PF_9 | ALT0, // same pin used for alternate HW + PF_10 = 0x5A, + PF_10_ALT0 = PF_10 | ALT0, // same pin used for alternate HW + PF_11 = 0x5B, + PF_12 = 0x5C, + PF_12_ALT0 = PF_12 | ALT0, // same pin used for alternate HW + PF_13 = 0x5D, + PF_14 = 0x5E, + PF_14_ALT0 = PF_14 | ALT0, // same pin used for alternate HW + PF_15 = 0x5F, + PG_0 = 0x60, + PG_1 = 0x61, + PG_2 = 0x62, + PG_3 = 0x63, + PG_4 = 0x64, + PG_5 = 0x65, + PG_6 = 0x66, + PG_7 = 0x67, + PG_8 = 0x68, + PG_9 = 0x69, + PG_10 = 0x6A, + PG_11 = 0x6B, + PG_12 = 0x6C, + PG_13 = 0x6D, + PG_14 = 0x6E, + PG_15 = 0x6F, + PH_0 = 0x70, + PH_1 = 0x71, + PH_2 = 0x72, + PH_3 = 0x73, + PH_3_ALT0 = PH_3 | ALT0, // same pin used for alternate HW + PH_4 = 0x74, + PH_4_ALT0 = PH_4 | ALT0, // same pin used for alternate HW + PH_5 = 0x75, + PH_5_ALT0 = PH_5 | ALT0, // same pin used for alternate HW + PH_6 = 0x76, + PH_7 = 0x77, + PH_8 = 0x78, + PH_9 = 0x79, + PH_10 = 0x7A, + PH_11 = 0x7B, + PH_12 = 0x7C, + PH_13 = 0x7D, + PH_14 = 0x7E, + PH_15 = 0x7F, + PI_0 = 0x80, + PI_1 = 0x81, + PI_2 = 0x82, + PI_3 = 0x83, + PI_4 = 0x84, + PI_5 = 0x85, + PI_6 = 0x86, + PI_7 = 0x87, + PI_8 = 0x88, + PI_9 = 0x89, + PI_10 = 0x8A, + PI_11 = 0x8B, + PI_12 = 0x8C, + PI_13 = 0x8D, + PI_14 = 0x8E, + PI_15 = 0x8F, + PJ_0 = 0x90, + PJ_1 = 0x91, + PJ_2 = 0x92, + PJ_3 = 0x93, + PJ_4 = 0x94, + PJ_5 = 0x95, + PJ_6 = 0x96, + PJ_7 = 0x97, + PJ_8 = 0x98, + PJ_8_ALT0 = PJ_8 | ALT0, // same pin used for alternate HW + PJ_9 = 0x99, + PJ_9_ALT0 = PJ_9 | ALT0, // same pin used for alternate HW + PJ_10 = 0x9A, + PJ_10_ALT0 = PJ_10 | ALT0, // same pin used for alternate HW + PJ_11 = 0x9B, + PJ_11_ALT0 = PJ_11 | ALT0, // same pin used for alternate HW + PJ_12 = 0x9C, + PJ_13 = 0x9D, + PJ_14 = 0x9E, + PJ_15 = 0x9F, + PK_0 = 0xA0, + PK_0_ALT0 = PK_0 | ALT0, // same pin used for alternate HW + PK_1 = 0xA1, + PK_1_ALT0 = PK_1 | ALT0, // same pin used for alternate HW + PK_2 = 0xA2, + PK_3 = 0xA3, + PK_4 = 0xA4, + PK_5 = 0xA5, + PK_6 = 0xA6, + PK_7 = 0xA7, + + WL_REG_ON = PB_10, + WL_HOST_WAKE = PI_8, + WL_SDIO_0 = PC_8, + WL_SDIO_1 = PC_9, + WL_SDIO_2 = PC_10, + WL_SDIO_3 = PC_11, + WL_SDIO_CMD = PD_2, + WL_SDIO_CLK = PC_12, + + /**** ADC internal channels ****/ + + ADC_TEMP = 0xF0, // Internal pin virtual value + ADC_VREF = 0xF1, // Internal pin virtual value + ADC_VBAT = 0xF2, // Internal pin virtual value + + // STDIO for console print +#ifdef MBED_CONF_TARGET_STDIO_UART_TX + CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX, +#else + CONSOLE_TX = PA_9, +#endif +#ifdef MBED_CONF_TARGET_STDIO_UART_RX + CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX, +#else + CONSOLE_RX = PB_7, +#endif + + //Led mappings + LED_RED = PI_12, //Red + LED_GREEN = PJ_13, //Green + LED_BLUE = PE_3, //Blue + + CYBSP_BT_UART_RX = PA_8, + CYBSP_BT_UART_TX = PF_7, + CYBSP_BT_UART_RTS = PF_8, + CYBSP_BT_UART_CTS = PF_9, + + CYBSP_BT_POWER = PA_10, + CYBSP_BT_HOST_WAKE = PG_3, + CYBSP_BT_DEVICE_WAKE = PH_7, + + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PD_11, + QSPI_FLASH1_IO1 = PD_12, + QSPI_FLASH1_IO2 = PE_2, + QSPI_FLASH1_IO3 = PF_6, + QSPI_FLASH1_SCK = PF_10, + QSPI_FLASH1_CSN = PG_6, + + /**** USB FS pins ****/ + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_HS_ULPI_STP = PC_0, + USB_OTG_HS_VBUS = PB_13, + + /**** ETHERNET pins ****/ + ETH_MDC = PC_1, + ETH_MDIO = PA_2, + ETH_CRS_DV = PA_7, + ETH_REF_CLK = PA_1, + ETH_RXD0 = PC_4, + ETH_RXD1 = PC_5, + ETH_RX_CLK = PA_1, + ETH_TXD0 = PG_13, + ETH_TXD1 = PG_12, + ETH_TX_EN = PG_11, + + /**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + RCC_OSC_IN = PH_0, + RCC_OSC_OUT = PH_1, + + /**** DEBUG pins ****/ + SYS_JTCK_SWCLK = PA_14, + SYS_JTDI = PA_15, + SYS_JTDO_SWO = PB_3, + SYS_JTMS_SWDIO = PA_13, + SYS_JTRST = PB_4, + SYS_PVD_IN = PB_7, + SYS_TRACECLK = PE_2, + SYS_TRACED0 = PE_3, + SYS_TRACED0_ALT0 = PC_1, + SYS_TRACED0_ALT1 = PG_13, + SYS_TRACED1 = PE_4, + SYS_TRACED1_ALT0 = PC_8, + SYS_TRACED1_ALT1 = PG_14, + SYS_TRACED2 = PE_5, + SYS_TRACED2_ALT0 = PD_2, + SYS_TRACED3 = PE_6, + SYS_TRACED3_ALT0 = PC_12, + SYS_TRGIO = PC_7, + SYS_WKUP0 = PA_0, + SYS_WKUP1 = PA_2, + SYS_WKUP2 = PC_13, + SYS_WKUP5 = PC_1, + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +// Standardized LED and button names +#define LED1 LED_RED +#define LED2 LED_GREEN +#define LED3 LED_BLUE +#define BUTTON1 PC_13 + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/targets/targets.json5 b/targets/targets.json5 index 48bace4fca7..1f05645729d 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3657,6 +3657,39 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", }, "device_name": "STM32H747XIHx" }, + "ARDUINO_GIGA": { + public: false, + inherits: ["STM32H747_ARDUINO"], + overrides: { + system_power_supply: "PWR_LDO_SUPPLY", + "enable-overdrive-mode": 1, + clock_source: "USE_PLL_HSE_XTAL | USE_PLL_HSI", + "network-default-interface-type": "WIFI", + lpuart_clock_source: "USE_LPUART_CLK_HSI", + "hse_value": 16000000 + }, + macros_add: [ + "BT_UART_NO_3M_SUPPORT" + ], + components_add: [ + "QSPIF" + ], + "image_url": "https://store-usa.arduino.cc/cdn/shop/products/ABX00063_00.default_643x483.jpg?v=1677493878" + }, + "ARDUINO_GIGA_CM7": { + inherits: ["ARDUINO_GIGA"], + "core": "Cortex-M7FD", + "mbed_rom_start": "0x08000000", + "mbed_rom_size" : "0x100000", + "mbed_ram_start": "0x24000000", + "mbed_ram_size" : "0x80000", + "extra_labels_add": [ + "STM32H747xI_CM7" + ], + "macros_add": [ + "CORE_CM7" + ] + }, "ARDUINO_PORTENTA_H7": { "public": false, "detect_code": ["0813"], diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake new file mode 100644 index 00000000000..028b19a6225 --- /dev/null +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -0,0 +1,53 @@ +# Mbed OS upload method configuration file for target ARDUINO_GIGA_CM7. +# To change any of these parameters from their default values, set them in your build script between where you +# include app.cmake and where you add mbed os as a subdirectory. + +# Notes: +# 1. To use this target with PyOCD, you need to install a pack: `pyocd pack install STM32H747XIHx`. +# You might also need to run `pyocd pack update` first. + +# General config parameters +# ------------------------------------------------------------- +set(UPLOAD_METHOD_DEFAULT MBED) + +# Config options for MBED +# ------------------------------------------------------------- + +set(MBED_UPLOAD_ENABLED TRUE) +set(MBED_RESET_BAUDRATE 115200) + +# Config options for JLINK +# ------------------------------------------------------------- + +set(JLINK_UPLOAD_ENABLED FALSE) +set(JLINK_CPU_NAME STM32H743ZI) +set(JLINK_CLOCK_SPEED 4000) +set(JLINK_UPLOAD_INTERFACE SWD) + +# Config options for PYOCD +# ------------------------------------------------------------- + +set(PYOCD_UPLOAD_ENABLED TRUE) +set(PYOCD_TARGET_NAME STM32H747XIHx) +set(PYOCD_CLOCK_SPEED 4000k) + +# Config options for OPENOCD +# ------------------------------------------------------------- + +set(OPENOCD_UPLOAD_ENABLED TRUE) +set(OPENOCD_CHIP_CONFIG_COMMANDS + -f ${CMAKE_CURRENT_LIST_DIR}/openocd_cfgs/stm32h747.cfg) + +# Config options for STM32Cube +# ------------------------------------------------------------- + +set(STM32CUBE_UPLOAD_ENABLED TRUE) +set(STM32CUBE_CONNECT_COMMAND -c port=SWD reset=HWrst) +set(STM32CUBE_GDBSERVER_ARGS --swd --initialize-reset --apid 0) + +# Config options for stlink +# ------------------------------------------------------------- + +set(STLINK_UPLOAD_ENABLED TRUE) +set(STLINK_LOAD_ADDRESS 0x8000000) +set(STLINK_ARGS --connect-under-reset) diff --git a/targets/upload_method_cfg/openocd_cfgs/stm32h747.cfg b/targets/upload_method_cfg/openocd_cfgs/stm32h747.cfg new file mode 100644 index 00000000000..5681ebd8dab --- /dev/null +++ b/targets/upload_method_cfg/openocd_cfgs/stm32h747.cfg @@ -0,0 +1,12 @@ +source [find interface/stlink-dap.cfg] +transport select dapdirect_swd + +# STM32H747xx devices are dual core (Cortex-M7 and Cortex-M4) +set DUAL_CORE 0 + +# enable CTI for cross halting both cores +set USE_CTI 0 + +source [find target/stm32h7x_dual_bank.cfg] + +reset_config srst_only From ba65afa1cb3d3dff68f7190b6330450dedbc4b5a Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Sat, 22 Jun 2024 14:06:14 -0700 Subject: [PATCH 02/16] Fix QSPI flash, add option to use DMA in circular mode --- .../COMPONENT_QSPIF/{mbed_lib.json => mbed_lib.json5} | 6 ++++++ targets/TARGET_STM/qspi_api.c | 4 ++-- targets/TARGET_STM/stm_dma_utils.c | 5 ++--- targets/TARGET_STM/stm_dma_utils.h | 5 +++-- targets/TARGET_STM/stm_spi_api.c | 4 ++-- targets/targets.json5 | 8 +++++++- 6 files changed, 22 insertions(+), 10 deletions(-) rename storage/blockdevice/COMPONENT_QSPIF/{mbed_lib.json => mbed_lib.json5} (88%) diff --git a/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json b/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json5 similarity index 88% rename from storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json rename to storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json5 index b8082723fe7..484cf77b702 100644 --- a/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json +++ b/storage/blockdevice/COMPONENT_QSPIF/mbed_lib.json5 @@ -54,6 +54,12 @@ "MCU_LPC546XX": { "QSPI_MIN_READ_SIZE": "4", "QSPI_MIN_PROG_SIZE": "4" + }, + "ARDUINO_GIGA": { + "QSPI_POLARITY_MODE": "QSPIF_POLARITY_MODE_1", + // The flash on this board (AT25SF128A) is quite old and does not have reset information in its + // SFDP table. + "enable-and-reset": true } } } diff --git a/targets/TARGET_STM/qspi_api.c b/targets/TARGET_STM/qspi_api.c index c84a4b59ec1..5951162c6eb 100644 --- a/targets/TARGET_STM/qspi_api.c +++ b/targets/TARGET_STM/qspi_api.c @@ -234,7 +234,7 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, OSPI_RegularCm #else /* OCTOSPI */ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTypeDef *st_command) { - debug_if(qspi_api_c_debug, "qspi_prepare_command In: instruction.value %x dummy_count %x address.bus_width %x address.disabled %x address.value %x address.size %x\n", + debug_if(qspi_api_c_debug, "qspi_prepare_command In: instruction.value 0x%" PRIx8 " dummy_count 0x%" PRIx8 " address.bus_width 0x%x address.disabled %d address.value 0x%" PRIx32 " address.size %x\n", command->instruction.value, command->dummy_count, command->address.bus_width, command->address.disabled, command->address.value, command->address.size); // TODO: shift these around to get more dynamic mapping @@ -372,7 +372,7 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTy st_command->NbData = 0; - debug_if(qspi_api_c_debug, "qspi_prepare_command Out: InstructionMode %x Instruction %x AddressMode %x AddressSize %x Address %x DataMode %x\n", + debug_if(qspi_api_c_debug, "qspi_prepare_command Out: InstructionMode 0x%" PRIx32 " Instruction 0x%" PRIx32 " AddressMode 0x%" PRIx32 " AddressSize 0x%" PRIx32 " Address 0x%" PRIx32 " DataMode %" PRIx32 "\n", st_command->InstructionMode, st_command->Instruction, st_command->AddressMode, st_command->AddressSize, st_command->Address, st_command->DataMode); return QSPI_STATUS_OK; diff --git a/targets/TARGET_STM/stm_dma_utils.c b/targets/TARGET_STM/stm_dma_utils.c index 49ea4adf952..f64b39b2a09 100644 --- a/targets/TARGET_STM/stm_dma_utils.c +++ b/targets/TARGET_STM/stm_dma_utils.c @@ -600,7 +600,7 @@ DMA_HandleTypeDef *stm_get_dma_handle_for_link(DMALinkInfo const * dmaLink) } DMA_HandleTypeDef *stm_init_dma_link(const DMALinkInfo *dmaLink, uint32_t direction, bool periphInc, bool memInc, - uint8_t periphDataAlignment, uint8_t memDataAlignment){ + uint8_t periphDataAlignment, uint8_t memDataAlignment, uint32_t mode){ #ifdef DMA_IP_VERSION_V2 // Channels start from 1 in IP v2 only @@ -668,6 +668,7 @@ DMA_HandleTypeDef *stm_init_dma_link(const DMALinkInfo *dmaLink, uint32_t direct #endif dmaHandle->Init.Direction = direction; + dmaHandle->Init.Mode = mode; // IP v3 uses different fields for... basically everything in this struct #ifdef DMA_IP_VERSION_V3 @@ -789,8 +790,6 @@ DMA_HandleTypeDef *stm_init_dma_link(const DMALinkInfo *dmaLink, uint32_t direct #endif - dmaHandle->Init.Mode = DMA_NORMAL; - HAL_DMA_Init(dmaHandle); // Set up interrupt diff --git a/targets/TARGET_STM/stm_dma_utils.h b/targets/TARGET_STM/stm_dma_utils.h index 16a549bf0cd..c398818afef 100644 --- a/targets/TARGET_STM/stm_dma_utils.h +++ b/targets/TARGET_STM/stm_dma_utils.h @@ -122,12 +122,13 @@ DMA_HandleTypeDef * stm_get_dma_handle_for_link(DMALinkInfo const * dmaLink); * @param periphInc Whether the Peripheral address register should be incremented or not. * @param memInc Whether the Memory address register should be incremented or not. * @param periphDataAlignment Alignment value of the peripheral data. 1, 2, or 4. - * @param memDataAlignment \c DMA_MDATAALIGN_BYTE, \c DMA_MDATAALIGN_HALFWORD, or \c DMA_MDATAALIGN_WORD + * @param memDataAlignment Alignment value of the memory data. 1, 2, or 4. + * @param mode Mode of the DMA transaction. DMA_NORMAL, DMA_CIRCULAR, etc * * @return Pointer to DMA handle allocated by this module. * @return NULL if the DMA channel used by the link has already been allocated by something else. */ -DMA_HandleTypeDef * stm_init_dma_link(DMALinkInfo const * dmaLink, uint32_t direction, bool periphInc, bool memInc, uint8_t periphDataAlignment, uint8_t memDataAlignment); +DMA_HandleTypeDef * stm_init_dma_link(DMALinkInfo const * dmaLink, uint32_t direction, bool periphInc, bool memInc, uint8_t periphDataAlignment, uint8_t memDataAlignment, uint32_t mode); /** * @brief Free a DMA link. diff --git a/targets/TARGET_STM/stm_spi_api.c b/targets/TARGET_STM/stm_spi_api.c index e5a969f906f..d849a01d1ab 100644 --- a/targets/TARGET_STM/stm_spi_api.c +++ b/targets/TARGET_STM/stm_spi_api.c @@ -541,7 +541,7 @@ static void spi_init_tx_dma(struct spi_s * obj) DMALinkInfo const *dmaLink = &SPITxDMALinks[obj->spiIndex - 1]; // Initialize DMA channel - DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_MEMORY_TO_PERIPH, false, true, 1, 1); + DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_MEMORY_TO_PERIPH, false, true, 1, 1, DMA_NORMAL); if(dmaHandle == NULL) { @@ -574,7 +574,7 @@ static void spi_init_rx_dma(struct spi_s * obj) DMALinkInfo const *dmaLink = &SPIRxDMALinks[obj->spiIndex - 1]; // Initialize DMA channel - DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_PERIPH_TO_MEMORY, false, true, 1, 1); + DMA_HandleTypeDef *dmaHandle = stm_init_dma_link(dmaLink, DMA_PERIPH_TO_MEMORY, false, true, 1, 1, DMA_NORMAL); if(dmaHandle == NULL) { diff --git a/targets/targets.json5 b/targets/targets.json5 index 1f05645729d..6a218b7be36 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3666,7 +3666,13 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", clock_source: "USE_PLL_HSE_XTAL | USE_PLL_HSI", "network-default-interface-type": "WIFI", lpuart_clock_source: "USE_LPUART_CLK_HSI", - "hse_value": 16000000 + "hse_value": 16000000, + + // Arduino Giga connects the primary USB port (USB-C port) to the USB Full Speed pins. + // TODO eventually this needs to be runtime configurable so that the two USB ports + // can use different speeds. With the current setting, Mbed will not be able to use + // the host mode port as that port uses high speed. + "usb_speed": "USE_USB_OTG_FS", }, macros_add: [ "BT_UART_NO_3M_SUPPORT" From fc5d359712aca0d9b3ed5bdae9e8938b0dc4cf8c Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Mon, 29 Jul 2024 09:26:03 -0700 Subject: [PATCH 03/16] Fix wifi driver build, add an option to just include the wifi firmware in the image --- .../minimal-cyhal/CMakeLists.txt | 2 +- .../wiced_filesystem_setup.cpp | 3 +++ .../minimal-cyhal/cyhal_gpio.cpp | 2 +- .../minimal-cyhal/wiced_filesystem.h | 4 ++-- .../firmware/COMPONENT_4343W_FS/4343WA1_bin.c | 7 +++++- drivers/CMakeLists.txt | 2 +- .../cy_rtos_rtx_adapter/CMakeLists.txt | 2 +- .../TARGET_ARDUINO_NICLA_SENSE_ME/device.h | 24 +------------------ targets/targets.json5 | 4 ++++ 9 files changed, 20 insertions(+), 30 deletions(-) diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/CMakeLists.txt b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/CMakeLists.txt index d93dffad41d..96a009a5c27 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/CMakeLists.txt +++ b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/CMakeLists.txt @@ -16,7 +16,7 @@ add_library(mbed-minimal-cyhal STATIC target_include_directories(mbed-minimal-cyhal PUBLIC .) target_link_libraries(mbed-minimal-cyhal PUBLIC mbed-core-flags - mbed-cy-rtos-abstraction) + mbed-rtos-flags) # This is needed in order to make cybsp_wifi.h include cycfg.h target_compile_definitions(mbed-minimal-cyhal PUBLIC COMPONENT_CUSTOM_DESIGN_MODUS) diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/wiced_filesystem_setup.cpp b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/wiced_filesystem_setup.cpp index 2105cd368b7..067462d3673 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/wiced_filesystem_setup.cpp +++ b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/wiced_filesystem_setup.cpp @@ -58,6 +58,8 @@ MBED_WEAK wiced_result_t whd_firmware_check_hook(const char *mounted_name, int m return WICED_ERROR; } +wiced_filesystem_t resource_fs_handle = 0; + wiced_result_t wiced_filesystem_setup() { static QSPIFBlockDevice *qspi_bd = nullptr; @@ -82,6 +84,7 @@ wiced_result_t wiced_filesystem_setup() mbr_bd = new mbed::MBRBlockDevice(qspi_bd, WIFI_DEFAULT_PARTITION); if(mbr_bd->init() != mbed::BD_ERROR_OK) { + whd_firmware_check_hook(WIFI_DEFAULT_MOUNT_NAME, true); delete mbr_bd; mbr_bd = nullptr; return WICED_ERROR; diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/cyhal_gpio.cpp b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/cyhal_gpio.cpp index bdaec7df42c..1ea82d2e123 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/cyhal_gpio.cpp +++ b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/cyhal_gpio.cpp @@ -22,7 +22,7 @@ #include #include "cyhal.h" #include "cybsp.h" -#include "drivers/DigitalIn.h" +#include "drivers/DigitalOut.h" #include "drivers/InterruptIn.h" #include diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/wiced_filesystem.h b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/wiced_filesystem.h index 436e36701f1..b110ab43fdf 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/wiced_filesystem.h +++ b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/wiced_filesystem.h @@ -76,9 +76,9 @@ typedef int wiced_file_t; */ typedef int wiced_filesystem_handle_type_t; -// Global "FS handle" object. Just here to match the WHD driver's expectations, we have one global +// Global "FS handle" object. Just here to match the WHD driver's expectations, we in fact have one global // filesystem object. -static wiced_filesystem_t resource_fs_handle = 0; +extern wiced_filesystem_t resource_fs_handle; /** * @brief Sets up the file system where the wifi module resources will be loaded from. diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/wifi-host-driver/resources/firmware/COMPONENT_4343W_FS/4343WA1_bin.c b/connectivity/drivers/wifi/COMPONENT_WHD/wifi-host-driver/resources/firmware/COMPONENT_4343W_FS/4343WA1_bin.c index ddaf0f7188f..08d3805da7d 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/wifi-host-driver/resources/firmware/COMPONENT_4343W_FS/4343WA1_bin.c +++ b/connectivity/drivers/wifi/COMPONENT_WHD/wifi-host-driver/resources/firmware/COMPONENT_4343W_FS/4343WA1_bin.c @@ -14,6 +14,7 @@ * limitations under the License. */ #include "wiced_resource.h" +#include "mbed-target-config.h" #if defined(CY_STORAGE_WIFI_DATA) CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used)) @@ -25489,5 +25490,9 @@ const unsigned char wifi_firmware_image_data[421098] = { 49, 45, 53, 97, 102, 99, 56, 99, 49, 101, 0, 254, 0, 68, 86, 73, 68, 32, 48, 49, 45, 101, 100, 48, 100, 55, 97, 53, 54 }; -resource_hnd_t wifi_firmware_image = { RESOURCE_IN_EXTERNAL_STORAGE, 421098, {.fs = { 0, "/wlan/4343WA1.BIN" }}}; +#if MBED_CONF_TARGET_WIFI_DRIVER_IN_QSPI_FLASH +resource_hnd_t wifi_firmware_image = { RESOURCE_IN_EXTERNAL_STORAGE, 421098, {.fs = { 0, "/wlan/4343WA1.BIN" }}}; +#else +const resource_hnd_t wifi_firmware_image = { RESOURCE_IN_MEMORY, 421098, {.mem = { (const char *) wifi_firmware_image_data }}}; +#endif diff --git a/drivers/CMakeLists.txt b/drivers/CMakeLists.txt index d74e1eb5937..ebd89bc7904 100644 --- a/drivers/CMakeLists.txt +++ b/drivers/CMakeLists.txt @@ -14,7 +14,7 @@ target_include_directories(mbed-core-flags . ./include ./include/drivers - ./include/drivers/internal + ./include/drivers/interfaces ) target_sources(mbed-core-sources diff --git a/features/frameworks/cy_rtos_rtx_adapter/CMakeLists.txt b/features/frameworks/cy_rtos_rtx_adapter/CMakeLists.txt index 0e61b65b2d4..c6e912759ca 100644 --- a/features/frameworks/cy_rtos_rtx_adapter/CMakeLists.txt +++ b/features/frameworks/cy_rtos_rtx_adapter/CMakeLists.txt @@ -19,6 +19,6 @@ else() # Build as part of the minimal CyHAL if it's enabled if(TARGET mbed-minimal-cyhal) target_sources(mbed-minimal-cyhal PRIVATE ${CY_RTOS_RTX_ADAPTER_SOURCES}) - target_include_directories(mbed-minimal-cyhal INTERFACE ${CY_RTOS_RTX_ADAPTER_INCLUDE_DIRS}) + target_include_directories(mbed-minimal-cyhal PUBLIC ${CY_RTOS_RTX_ADAPTER_INCLUDE_DIRS}) endif() endif() diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h index ee047587421..4ffd3337994 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/TARGET_ARDUINO_NICLA_SENSE_ME/device.h @@ -1,8 +1,5 @@ /* mbed Microcontroller Library * Copyright (c) 2006-2013 ARM Limited -======= -/* - * Copyright 2024 Arduino SA * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -22,23 +19,4 @@ #include "objects.h" -#endif -======= -#include "cyhal_system.h" - -#include "mbed_critical.h" - -uint32_t cyhal_system_critical_section_enter(void) -{ - bool were_interrupts_enabled = !core_util_in_critical_section(); - - core_util_critical_section_enter(); - - return were_interrupts_enabled; -} - -void cyhal_system_critical_section_exit(uint32_t old_state) -{ - (void)old_state; - core_util_critical_section_exit(); -} +#endif \ No newline at end of file diff --git a/targets/targets.json5 b/targets/targets.json5 index 6a218b7be36..4f57bbf01fc 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3627,6 +3627,10 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "usb_speed": { "help": "USE_USB_OTG_FS or USE_USB_OTG_HS or USE_USB_HS_IN_FS", "value": "USE_USB_OTG_HS" + }, + "wifi_driver_in_qspi_flash": { + help: "If this is false, and wifi is used in the application, the wifi chip firmware will be included in the application firmware (+411kiB code size). If true, then the wifi firmware is loaded from the external QSPI flash instead, and you must install it using the Arduino IDE sketch for this purpose.", + value: false } }, "components_add": [ From 5d54384a68c9d11fa73e230f580b111029deac20 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Mon, 26 Aug 2024 09:18:22 -0700 Subject: [PATCH 04/16] Add memory bank config --- targets/targets.json5 | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/targets/targets.json5 b/targets/targets.json5 index 4f57bbf01fc..f0f2c0f92b5 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3689,10 +3689,13 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "ARDUINO_GIGA_CM7": { inherits: ["ARDUINO_GIGA"], "core": "Cortex-M7FD", - "mbed_rom_start": "0x08000000", - "mbed_rom_size" : "0x100000", - "mbed_ram_start": "0x24000000", - "mbed_ram_size" : "0x80000", + "memory_bank_config": { + // Select flash bank 1 + "IROM1": { + "start": 0x08000000, + "size": 0x100000 + } + }, "extra_labels_add": [ "STM32H747xI_CM7" ], From 2e614d3022febe5ecaa85b3619240e284f3bfa23 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Mon, 23 Sep 2024 09:11:40 -0700 Subject: [PATCH 05/16] Update targets JSON to new format for dual core devices --- targets/targets.json5 | 56 +++++++++++-------------------------------- 1 file changed, 14 insertions(+), 42 deletions(-) diff --git a/targets/targets.json5 b/targets/targets.json5 index f0f2c0f92b5..559b8f09b86 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3568,22 +3568,13 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "system_power_supply": "PWR_DIRECT_SMPS_SUPPLY", // Cannot enable overdrive mode because the default power supply is SMPS "enable-overdrive-mode": 0 - } - }, - "DISCO_H747I_CM7": { - // NOTE: inherit from MCU_STM32H747xI_CM7 first so that target's attributes get priority over - // DISCO_H747I's attributes. - "inherits": [ - "MCU_STM32H747xI_CM7", - "DISCO_H747I" - ], + }, "supported_form_factors": [ "ARDUINO_UNO", "STMOD", "PMOD" ], "extra_labels_add": [ - "DISCO_H747I", "MT25QL512" ], "components_add": [ @@ -3597,27 +3588,19 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", ], "device_name": "STM32H747XIHx" }, + "DISCO_H747I_CM7": { + // NOTE: inherit from MCU_STM32H747xI_CM7 first so that target's attributes get priority over + // DISCO_H747I's attributes. + "inherits": [ + "MCU_STM32H747xI_CM7", + "DISCO_H747" + ] + }, "DISCO_H747I_CM4": { "inherits": [ "MCU_STM32H747xI_CM4", "DISCO_H747I" - ], - "extra_labels_add": [ - "DISCO_H747I", - "MT25QL512" - ], - "device_has_add": [ - "QSPI" - ], - "components_add": [ - "QSPIF" - ], - "supported_form_factors": [ - "ARDUINO_UNO", - "STMOD", - "PMOD" - ], - "device_name": "STM32H747XIHx" + ] }, // Umbrella target for all Arduino boards that use an H747 chip "STM32H747_ARDUINO": { @@ -3687,21 +3670,10 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "image_url": "https://store-usa.arduino.cc/cdn/shop/products/ABX00063_00.default_643x483.jpg?v=1677493878" }, "ARDUINO_GIGA_CM7": { - inherits: ["ARDUINO_GIGA"], - "core": "Cortex-M7FD", - "memory_bank_config": { - // Select flash bank 1 - "IROM1": { - "start": 0x08000000, - "size": 0x100000 - } - }, - "extra_labels_add": [ - "STM32H747xI_CM7" - ], - "macros_add": [ - "CORE_CM7" - ] + inherits: ["MCU_STM32H747xI_CM7", "ARDUINO_GIGA"], + }, + "ARDUINO_GIGA_CM4": { + inherits: ["MCU_STM32H747xI_CM4", "ARDUINO_GIGA"], }, "ARDUINO_PORTENTA_H7": { "public": false, From 55f6c099f4af7a904b58f4690c8d9ece1b1c3335 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Wed, 19 Mar 2025 09:22:42 -0700 Subject: [PATCH 06/16] Memory bank config for bootloader --- targets/targets.json5 | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/targets/targets.json5 b/targets/targets.json5 index 559b8f09b86..2b442e3e129 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3667,7 +3667,15 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", components_add: [ "QSPIF" ], - "image_url": "https://store-usa.arduino.cc/cdn/shop/products/ABX00063_00.default_643x483.jpg?v=1677493878" + "image_url": "https://store-usa.arduino.cc/cdn/shop/products/ABX00063_00.default_643x483.jpg?v=1677493878", + + // Leave room for the Arduino bootloader + "memory_bank_config": { + "IROM1": { + start: 0x08020000, + size: 0x1E0000 + } + } }, "ARDUINO_GIGA_CM7": { inherits: ["MCU_STM32H747xI_CM7", "ARDUINO_GIGA"], From 5da0b1632630d6a4ac324e4b0efef1956351493b Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Wed, 19 Mar 2025 09:52:22 -0700 Subject: [PATCH 07/16] Fix memory bank config --- targets/targets.json5 | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/targets/targets.json5 b/targets/targets.json5 index 2b442e3e129..da5e68995b3 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3668,20 +3668,28 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "QSPIF" ], "image_url": "https://store-usa.arduino.cc/cdn/shop/products/ABX00063_00.default_643x483.jpg?v=1677493878", + }, + "ARDUINO_GIGA_CM7": { + inherits: ["MCU_STM32H747xI_CM7", "ARDUINO_GIGA"], - // Leave room for the Arduino bootloader + // Leave room for the Arduino bootloader, using the next 1M of space "memory_bank_config": { "IROM1": { - start: 0x08020000, - size: 0x1E0000 - } + "start": 0x08020000, + "size": 0x100000 + }, } }, - "ARDUINO_GIGA_CM7": { - inherits: ["MCU_STM32H747xI_CM7", "ARDUINO_GIGA"], - }, "ARDUINO_GIGA_CM4": { inherits: ["MCU_STM32H747xI_CM4", "ARDUINO_GIGA"], + + // Leave room for the Arduino bootloader and the CM7 application, using the next 896k of space + "memory_bank_config": { + "IROM1": { + "start": 0x08120000, + "size": 0xE0000 + }, + } }, "ARDUINO_PORTENTA_H7": { "public": false, From 43ca1e2714b47280f01ccd800699aa1a080bb027 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Thu, 27 Mar 2025 01:12:18 -0700 Subject: [PATCH 08/16] Make Giga application start addr be where bootloader expects it. This wastes 256k of flash but oh well... --- targets/targets.json5 | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/targets/targets.json5 b/targets/targets.json5 index da5e68995b3..58b906eb39b 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3675,7 +3675,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", // Leave room for the Arduino bootloader, using the next 1M of space "memory_bank_config": { "IROM1": { - "start": 0x08020000, + "start": 0x08040000, "size": 0x100000 }, } @@ -3683,11 +3683,11 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "ARDUINO_GIGA_CM4": { inherits: ["MCU_STM32H747xI_CM4", "ARDUINO_GIGA"], - // Leave room for the Arduino bootloader and the CM7 application, using the next 896k of space + // Leave room for the Arduino bootloader and the CM7 application, using the next 768k of space "memory_bank_config": { "IROM1": { - "start": 0x08120000, - "size": 0xE0000 + "start": 0x08140000, + "size": 0xC0000 }, } }, From 59891a517ba51addde6b9dadd1743a850555f251 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Sun, 30 Mar 2025 09:41:11 -0700 Subject: [PATCH 09/16] DFU support: add STM32CUBE DFU --- targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake index 028b19a6225..865c95fdde7 100644 --- a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -49,5 +49,17 @@ set(STM32CUBE_GDBSERVER_ARGS --swd --initialize-reset --apid 0) # ------------------------------------------------------------- set(STLINK_UPLOAD_ENABLED TRUE) -set(STLINK_LOAD_ADDRESS 0x8000000) set(STLINK_ARGS --connect-under-reset) + +# Config options for dfu-util +# ------------------------------------------------------------- + +set(DFU_UTIL_UPLOAD_ENABLED TRUE) +set(DFU_UTIL_TARGET_VID_PID 0483:df11) # STM32 USB ROM bootloader +set(DFU_UTIL_TARGET_INTERFACE 0) + +# Config options for STM32CUBE_DFU +# ------------------------------------------------------------- + +set(STM32CUBE_DFU_UPLOAD_ENABLED TRUE) +set(STM32CUBE_DFU_CONNECT_COMMAND port=USB vid=0x0483 pid=0xdf11) # STM32 USB ROM bootloader From 61bb6f0fe19843fddb5a68b72e409631f714958c Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Sun, 30 Mar 2025 13:10:55 -0700 Subject: [PATCH 10/16] Also add Portenta H7 upload method --- .../TARGET_STM/TARGET_STM32H7/CMakeLists.txt | 2 +- .../minimal_cyhal_config.h | 2 +- targets/targets.json5 | 24 ++++++- .../upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 2 +- .../ARDUINO_PORTENTA_H7_M7.cmake | 65 +++++++++++++++++++ 5 files changed, 89 insertions(+), 6 deletions(-) create mode 100644 targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake diff --git a/connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/CMakeLists.txt b/connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/CMakeLists.txt index 9181cace75d..143db531f4f 100644 --- a/connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/CMakeLists.txt +++ b/connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/CMakeLists.txt @@ -3,7 +3,7 @@ if("DISCO_H747I" IN_LIST MBED_TARGET_LABELS) add_subdirectory(TARGET_DISCO_H747I) -elseif("PORTENTA_H7" IN_LIST MBED_TARGET_LABELS) +elseif("ARDUINO_PORTENTA_H7" IN_LIST MBED_TARGET_LABELS) add_subdirectory(TARGET_PORTENTA_H7) elseif("NUCLEO_H743ZI2" IN_LIST MBED_TARGET_LABELS) add_subdirectory(TARGET_NUCLEO_H743ZI2) diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/minimal_cyhal_config.h b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/minimal_cyhal_config.h index c5794f00abf..bf666f7e934 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/minimal_cyhal_config.h +++ b/connectivity/drivers/wifi/COMPONENT_WHD/minimal-cyhal/TARGET_STM32H7/TARGET_STM32H747_ARDUINO/minimal_cyhal_config.h @@ -59,7 +59,7 @@ #define BSP_LED1 PI_12 #define BSP_LED2 PE_3 #define BSP_LED3 PJ_13 -#elif TARGET_ARDUINO_PORTENTA +#elif TARGET_ARDUINO_PORTENTA_H7 #define WIFI_SDIO_OOB_IRQ PJ_5 #define WIFI_WL_REG_ON PJ_1 #define BSP_LED1 PK_5 diff --git a/targets/targets.json5 b/targets/targets.json5 index 58b906eb39b..afc91f91d49 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3706,16 +3706,34 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "hse_value": 25000000, // Can use overdrive because LDO is regulating core voltage (even though // the LDO power comes from the SMPS). - "enable-overdrive-mode": 1 + "enable-overdrive-mode": 1, + "console-usb": true, + "console-uart": false }, "device_name": "STM32H747XIHx", "image_url": "https://store.arduino.cc/cdn/shop/products/ABX00042_00.iso_1200x900.jpg?v=1675840144" }, "ARDUINO_PORTENTA_H7_M7": { - "inherits": ["MCU_STM32H747xI_CM7", "ARDUINO_PORTENTA_H7"] + "inherits": ["MCU_STM32H747xI_CM7", "ARDUINO_PORTENTA_H7"], + + // Leave room for the Arduino bootloader, using the next 1M of space + "memory_bank_config": { + "IROM1": { + "start": 0x08040000, + "size": 0x100000 + }, + } }, "ARDUINO_PORTENTA_H7_M4": { - "inherits": ["MCU_STM32H747xI_CM4", "ARDUINO_PORTENTA_H7"] + "inherits": ["MCU_STM32H747xI_CM4", "ARDUINO_PORTENTA_H7"], + + // Leave room for the Arduino bootloader and the CM7 application, using the next 768k of space + "memory_bank_config": { + "IROM1": { + "start": 0x08140000, + "size": 0xC0000 + }, + } }, "MCU_STM32H750xB": { "inherits": [ diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake index 865c95fdde7..e558eaa9a10 100644 --- a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -20,7 +20,7 @@ set(MBED_RESET_BAUDRATE 115200) # ------------------------------------------------------------- set(JLINK_UPLOAD_ENABLED FALSE) -set(JLINK_CPU_NAME STM32H743ZI) +set(JLINK_CPU_NAME STM32H747XI) set(JLINK_CLOCK_SPEED 4000) set(JLINK_UPLOAD_INTERFACE SWD) diff --git a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake new file mode 100644 index 00000000000..ceee4df91d0 --- /dev/null +++ b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake @@ -0,0 +1,65 @@ +# Mbed OS upload method configuration file for target ARDUINO_PORTENTA_H7_M7. +# To change any of these parameters from their default values, set them in your build script between where you +# include app.cmake and where you add mbed os as a subdirectory. + +# Notes: +# 1. To use this target with PyOCD, you need to install a pack: `pyocd pack install STM32H747XIHx`. +# You might also need to run `pyocd pack update` first. + +# General config parameters +# ------------------------------------------------------------- +set(UPLOAD_METHOD_DEFAULT MBED) + +# Config options for MBED +# ------------------------------------------------------------- + +set(MBED_UPLOAD_ENABLED TRUE) +set(MBED_RESET_BAUDRATE 115200) + +# Config options for JLINK +# ------------------------------------------------------------- + +set(JLINK_UPLOAD_ENABLED FALSE) +set(JLINK_CPU_NAME STM32H747XI) +set(JLINK_CLOCK_SPEED 4000) +set(JLINK_UPLOAD_INTERFACE SWD) + +# Config options for PYOCD +# ------------------------------------------------------------- + +set(PYOCD_UPLOAD_ENABLED TRUE) +set(PYOCD_TARGET_NAME STM32H747XIHx) +set(PYOCD_CLOCK_SPEED 4000k) + +# Config options for OPENOCD +# ------------------------------------------------------------- + +set(OPENOCD_UPLOAD_ENABLED TRUE) +set(OPENOCD_CHIP_CONFIG_COMMANDS + -f ${CMAKE_CURRENT_LIST_DIR}/openocd_cfgs/stm32h747.cfg) + +# Config options for STM32Cube +# ------------------------------------------------------------- + +set(STM32CUBE_UPLOAD_ENABLED TRUE) +set(STM32CUBE_CONNECT_COMMAND -c port=SWD reset=HWrst) +set(STM32CUBE_GDBSERVER_ARGS --swd --initialize-reset --apid 0) + +# Config options for STM32Cube DFU +# ------------------------------------------------------------- + +set(STM32CUBE_DFU_UPLOAD_ENABLED TRUE) +set(STM32CUBE_CONNECT_COMMAND -c port=USB vid=0x2341 pid=0x035b) + +# Config options for stlink +# ------------------------------------------------------------- + +set(STLINK_UPLOAD_ENABLED TRUE) +set(STLINK_ARGS --connect-under-reset) + +# Config options for dfu-util +# ------------------------------------------------------------- + +set(DFU_UTIL_UPLOAD_ENABLED TRUE) +set(DFU_UTIL_TARGET_VID_PID 2341:035b) +set(DFU_UTIL_TARGET_INTERFACE 0) From 828b90b0ac1e53cb7f4e8a0f73d2956fa72cee10 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Sun, 30 Mar 2025 19:20:12 -0700 Subject: [PATCH 11/16] Fix some small Portenta issues --- .../drivers/wifi/COMPONENT_WHD/whd_mac/CMakeLists.txt | 4 ++-- targets/targets.json5 | 7 +++++++ targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake | 2 +- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/connectivity/drivers/wifi/COMPONENT_WHD/whd_mac/CMakeLists.txt b/connectivity/drivers/wifi/COMPONENT_WHD/whd_mac/CMakeLists.txt index 2d6069b80d3..da463fc2e24 100644 --- a/connectivity/drivers/wifi/COMPONENT_WHD/whd_mac/CMakeLists.txt +++ b/connectivity/drivers/wifi/COMPONENT_WHD/whd_mac/CMakeLists.txt @@ -2,7 +2,7 @@ # SPDX-License-Identifier: Apache-2.0 target_include_directories(mbed-wifi - INTERFACE + PUBLIC . ./interface ./network @@ -10,7 +10,7 @@ target_include_directories(mbed-wifi ) target_sources(mbed-wifi - INTERFACE + PRIVATE interface/CyDhcpServer.cpp interface/WhdAccessPoint.cpp interface/WhdSTAInterface.cpp diff --git a/targets/targets.json5 b/targets/targets.json5 index afc91f91d49..980784e402a 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -3710,6 +3710,13 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "console-usb": true, "console-uart": false }, + macros_add: [ + "BT_UART_NO_3M_SUPPORT", + "LSE_STARTUP_TIMEOUT=200" + ], + components_add: [ + "QSPIF" + ], "device_name": "STM32H747XIHx", "image_url": "https://store.arduino.cc/cdn/shop/products/ABX00042_00.iso_1200x900.jpg?v=1675840144" }, diff --git a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake index ceee4df91d0..64112e79ddf 100644 --- a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake +++ b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake @@ -49,7 +49,7 @@ set(STM32CUBE_GDBSERVER_ARGS --swd --initialize-reset --apid 0) # ------------------------------------------------------------- set(STM32CUBE_DFU_UPLOAD_ENABLED TRUE) -set(STM32CUBE_CONNECT_COMMAND -c port=USB vid=0x2341 pid=0x035b) +set(STM32CUBE_DFU_CONNECT_COMMAND -c port=USB vid=0x2341 pid=0x035b) # Config options for stlink # ------------------------------------------------------------- From 09950b8ca4e65cfaf533d8acd70430aafa35c4ef Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Thu, 24 Apr 2025 00:45:32 -0700 Subject: [PATCH 12/16] Fix gemalto build --- connectivity/drivers/cellular/GEMALTO/CMakeLists.txt | 2 +- connectivity/lwipstack/mbed_lib.json5 | 4 ---- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/connectivity/drivers/cellular/GEMALTO/CMakeLists.txt b/connectivity/drivers/cellular/GEMALTO/CMakeLists.txt index d7bf4f24272..076c1fd212c 100644 --- a/connectivity/drivers/cellular/GEMALTO/CMakeLists.txt +++ b/connectivity/drivers/cellular/GEMALTO/CMakeLists.txt @@ -2,5 +2,5 @@ # SPDX-License-Identifier: Apache-2.0 if("COMPONENT_GEMALTO_CINTERION=1" IN_LIST MBED_TARGET_DEFINITIONS) - add_subdirectory(CINTERION) + add_subdirectory(COMPONENT_GEMALTO_CINTERION) endif() \ No newline at end of file diff --git a/connectivity/lwipstack/mbed_lib.json5 b/connectivity/lwipstack/mbed_lib.json5 index cce53b213e2..bd8d89dcdf3 100644 --- a/connectivity/lwipstack/mbed_lib.json5 +++ b/connectivity/lwipstack/mbed_lib.json5 @@ -207,10 +207,6 @@ }, "MTS_DRAGONFLY_F411RE": { "tcpip-thread-stacksize": 1600 - }, - "STM32H7": { - // On STM32H7, we have lots of RAM, so we can make the pool size relatively large - "pbuf-pool-size": 16, } } } From 6ea6e8415cab9ca15fb4e8fc8ec12a1b2f903c2e Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Wed, 30 Apr 2025 09:01:45 -0700 Subject: [PATCH 13/16] Oops no MBED upload support! --- targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 8 +------- targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake | 8 +------- 2 files changed, 2 insertions(+), 14 deletions(-) diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake index e558eaa9a10..52c73f8f8de 100644 --- a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -8,13 +8,7 @@ # General config parameters # ------------------------------------------------------------- -set(UPLOAD_METHOD_DEFAULT MBED) - -# Config options for MBED -# ------------------------------------------------------------- - -set(MBED_UPLOAD_ENABLED TRUE) -set(MBED_RESET_BAUDRATE 115200) +set(UPLOAD_METHOD_DEFAULT DFU_UTIL) # Config options for JLINK # ------------------------------------------------------------- diff --git a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake index 64112e79ddf..31b867e379a 100644 --- a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake +++ b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake @@ -8,13 +8,7 @@ # General config parameters # ------------------------------------------------------------- -set(UPLOAD_METHOD_DEFAULT MBED) - -# Config options for MBED -# ------------------------------------------------------------- - -set(MBED_UPLOAD_ENABLED TRUE) -set(MBED_RESET_BAUDRATE 115200) +set(UPLOAD_METHOD_DEFAULT DFU_UTIL) # Config options for JLINK # ------------------------------------------------------------- From bd681546d81fcc209ebc9ff00f58dc76da5b517f Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Wed, 7 May 2025 09:31:19 -0700 Subject: [PATCH 14/16] Fix Arduino Giga bootloader VID & PID --- targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake index 52c73f8f8de..1d1c657e6f4 100644 --- a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -49,11 +49,11 @@ set(STLINK_ARGS --connect-under-reset) # ------------------------------------------------------------- set(DFU_UTIL_UPLOAD_ENABLED TRUE) -set(DFU_UTIL_TARGET_VID_PID 0483:df11) # STM32 USB ROM bootloader +set(DFU_UTIL_TARGET_VID_PID 2341:0366) # Arduino Giga bootloader set(DFU_UTIL_TARGET_INTERFACE 0) # Config options for STM32CUBE_DFU # ------------------------------------------------------------- set(STM32CUBE_DFU_UPLOAD_ENABLED TRUE) -set(STM32CUBE_DFU_CONNECT_COMMAND port=USB vid=0x0483 pid=0xdf11) # STM32 USB ROM bootloader +set(STM32CUBE_DFU_CONNECT_COMMAND port=USB vid=0x2341 pid=0x0366) # Arduino Giga bootloader From ff179bcec133b726cc6b85ca1b66142cbab582f6 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Wed, 7 May 2025 09:32:17 -0700 Subject: [PATCH 15/16] Add DFU note --- targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 2 ++ targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake | 2 ++ 2 files changed, 4 insertions(+) diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake index 1d1c657e6f4..b061c215046 100644 --- a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -5,6 +5,8 @@ # Notes: # 1. To use this target with PyOCD, you need to install a pack: `pyocd pack install STM32H747XIHx`. # You might also need to run `pyocd pack update` first. +# 2. To use the DFU upload methods, you need to double-tap the reset button first to put the +# board in DFU mode. # General config parameters # ------------------------------------------------------------- diff --git a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake index 31b867e379a..77f792d6ec2 100644 --- a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake +++ b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake @@ -5,6 +5,8 @@ # Notes: # 1. To use this target with PyOCD, you need to install a pack: `pyocd pack install STM32H747XIHx`. # You might also need to run `pyocd pack update` first. +# 2. To use the DFU upload methods, you need to double-tap the reset button first to put the +# board in DFU mode. # General config parameters # ------------------------------------------------------------- From 4735ed9233aa1ed2a10946615300eaa302ce5737 Mon Sep 17 00:00:00 2001 From: Jamie Smith Date: Thu, 8 May 2025 00:27:28 -0700 Subject: [PATCH 16/16] Note about udev rules --- targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake | 2 ++ targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake | 2 ++ 2 files changed, 4 insertions(+) diff --git a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake index b061c215046..0e531c32c20 100644 --- a/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake +++ b/targets/upload_method_cfg/ARDUINO_GIGA_CM7.cmake @@ -7,6 +7,8 @@ # You might also need to run `pyocd pack update` first. # 2. To use the DFU upload methods, you need to double-tap the reset button first to put the # board in DFU mode. +# 3. On Linux, you will need to add a udev rule to be able to upload over DFU: +# SUBSYSTEM=="usb", ATTRS{idVendor}=="2341", ATTRS{idProduct}=="0366", MODE="664", GROUP="plugdev" # General config parameters # ------------------------------------------------------------- diff --git a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake index 77f792d6ec2..07f4ce4c097 100644 --- a/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake +++ b/targets/upload_method_cfg/ARDUINO_PORTENTA_H7_M7.cmake @@ -7,6 +7,8 @@ # You might also need to run `pyocd pack update` first. # 2. To use the DFU upload methods, you need to double-tap the reset button first to put the # board in DFU mode. +# 3. On Linux, you will need to add a udev rule to be able to upload over DFU: +# SUBSYSTEM=="usb", ATTRS{idVendor}=="2341", ATTRS{idProduct}=="035b", MODE="664", GROUP="plugdev" # General config parameters # -------------------------------------------------------------