diff --git a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17_emac.cpp b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17_emac.cpp index 34ddda1a744..c272b52c601 100644 --- a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17_emac.cpp +++ b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17_emac.cpp @@ -120,15 +120,9 @@ struct lpc_enetdata { uint32_t lpc_reserved_tx_num; /**< Number of reserved TX descriptors, zero-copy mode */ }; -#if defined(TARGET_LPC1768) -/** \brief Group LPC17xx processors into one definition - */ -#define TARGET_LPC17XX -#endif - #if defined(TARGET_LPC17XX) # if defined(TOOLCHAIN_GCC_ARM) || defined(TOOLCHAIN_ARM) -# define ETHMEM_SECTION __attribute__((section("AHBSRAM"),aligned)) +# define ETHMEM_SECTION __attribute__((section("AHBSRAM"), aligned(32))) # endif #endif @@ -385,9 +379,9 @@ int32_t LPC17_EMAC::lpc_packet_addr_notsafe(void *addr) /* Check for legal address ranges */ #if defined(TARGET_LPC17XX) if ((((uint32_t) addr >= 0x2007C000) && ((uint32_t) addr < 0x20083FFF))) { -#endif return 0; } +#endif return 1; } diff --git a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17xx_emac.h b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17xx_emac.h index 13019d46e98..d7f50128ab2 100644 --- a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17xx_emac.h +++ b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17xx_emac.h @@ -10,6 +10,7 @@ * * Copyright(C) 2010, NXP Semiconductor * All rights reserved. +* SPDX-License-Identifier: Apache-2.0 * *********************************************************************** * Software that is described herein is for illustrative purposes only diff --git a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_emac_config.h b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_emac_config.h index 43efb8a7fd2..cb02c89702d 100644 --- a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_emac_config.h +++ b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_emac_config.h @@ -6,9 +6,10 @@ * @version 1.0 * @date 20 Nov. 2011 * @author NXP MCU SW Application Team -* +* * Copyright(C) 2011, NXP Semiconductor * All rights reserved. +* SPDX-License-Identifier: Apache-2.0 * *********************************************************************** * Software that is described herein is for illustrative purposes only @@ -61,7 +62,7 @@ */ #define PHY_USE_100MBS 1 /**< Sets data rate to 100Mbps. */ -/** +/** * @} */ @@ -95,7 +96,7 @@ */ #define LPC_TX_PBUF_BOUNCE_EN 1 -/** +/** * @} */ diff --git a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy.h b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy.h index 5c2f3142157..dbde76094f0 100644 --- a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy.h +++ b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy.h @@ -9,6 +9,7 @@ * * Copyright(C) 2011, NXP Semiconductor * All rights reserved. +* SPDX-License-Identifier: Apache-2.0 * *********************************************************************** * Software that is described herein is for illustrative purposes only diff --git a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy_dp83848.cpp b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy_dp83848.cpp index 3cc40d38931..a41b2de79ee 100644 --- a/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy_dp83848.cpp +++ b/connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc_phy_dp83848.cpp @@ -9,6 +9,7 @@ * * Copyright(C) 2011, NXP Semiconductor * All rights reserved. +* SPDX-License-Identifier: Apache-2.0 * *********************************************************************** * Software that is described herein is for illustrative purposes only diff --git a/connectivity/lwipstack/lwip-sys/arch/cc.h b/connectivity/lwipstack/lwip-sys/arch/cc.h index 6234e80471f..7c80d4e78f2 100644 --- a/connectivity/lwipstack/lwip-sys/arch/cc.h +++ b/connectivity/lwipstack/lwip-sys/arch/cc.h @@ -131,14 +131,8 @@ void trace_to_ascii_hex_dump(char* prefix, int len, char *data); /* Define the memory area for the lwip's memory pools */ #ifndef MEMP_SECTION -#if defined(TARGET_LPC1768) -# if defined (__ICCARM__) -# define MEMP_SECTION -# elif defined(TOOLCHAIN_GCC_CR) -# define MEMP_SECTION __attribute__((section(".data.$RamPeriph32"))) -# else -# define MEMP_SECTION __attribute__((section("AHBSRAM"),aligned)) -# endif +#if defined(TARGET_LPC17XX) +# define MEMP_SECTION __attribute__((section("AHBSRAM"),aligned)) #endif #endif diff --git a/connectivity/lwipstack/lwip-sys/arch/lwip_sys_arch.c b/connectivity/lwipstack/lwip-sys/arch/lwip_sys_arch.c index e8ac7a62108..1d2b504cbbb 100644 --- a/connectivity/lwipstack/lwip-sys/arch/lwip_sys_arch.c +++ b/connectivity/lwipstack/lwip-sys/arch/lwip_sys_arch.c @@ -14,6 +14,8 @@ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * SPDX-License-Identifier: MIT */ #include @@ -31,20 +33,10 @@ /* Define the heap ourselves to give us section placement control */ #ifndef ETHMEM_SECTION -#if defined(TARGET_LPC1768) -# if defined (__ICCARM__) -# define ETHMEM_SECTION -# elif defined(TOOLCHAIN_GCC_CR) -# define ETHMEM_SECTION __attribute__((section(".data.$RamPeriph32"))) -# else -# define ETHMEM_SECTION __attribute__((section("AHBSRAM"),aligned)) -# endif +#if defined(TARGET_LPC17XX) +# define ETHMEM_SECTION __attribute__((section("AHBSRAM"),aligned)) #elif defined(TARGET_STM32H7) -# if defined (__ICCARM__) -# define ETHMEM_SECTION -# else -# define ETHMEM_SECTION __attribute__((section(".ethusbram"))) -# endif +# define ETHMEM_SECTION __attribute__((section(".ethusbram"))) #else #define ETHMEM_SECTION #endif @@ -65,9 +57,6 @@ struct mem { #define SIZEOF_STRUCT_MEM LWIP_MEM_ALIGN_SIZE(sizeof(struct mem)) #define MEM_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEM_SIZE) -#if defined (__ICCARM__) -#pragma location = ".ethusbram" -#endif LWIP_DECLARE_MEMORY_ALIGNED(lwip_ram_heap, MEM_SIZE_ALIGNED + (2U*SIZEOF_STRUCT_MEM)) ETHMEM_SECTION; #if NO_SYS==1 @@ -320,7 +309,7 @@ err_t sys_sem_new(sys_sem_t *sem, u8_t count) { sem->id = osSemaphoreNew(UINT16_MAX, count, &sem->attr); if (sem->id == NULL) MBED_ERROR1(MBED_MAKE_ERROR(MBED_MODULE_NETWORK_STACK, MBED_ERROR_CODE_FAILED_OPERATION), "sys_sem_new create error\n", (u32_t)sem); - + return ERR_OK; } @@ -349,12 +338,12 @@ err_t sys_sem_new(sys_sem_t *sem, u8_t count) { *---------------------------------------------------------------------------*/ u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout) { u32_t start = osKernelGetTickCount(); - + if (osSemaphoreAcquire(sem->id, (timeout != 0)?(timeout):(osWaitForever)) != osOK) { MBED_WARNING1(MBED_MAKE_ERROR(MBED_MODULE_NETWORK_STACK, MBED_ERROR_CODE_TIME_OUT), "sys_arch_sem_wait time out\n", (u32_t)sem); return SYS_ARCH_TIMEOUT; } - + return osKernelGetTickCount() - start; } @@ -394,7 +383,7 @@ err_t sys_mutex_new(sys_mutex_t *mutex) { MBED_WARNING1(MBED_MAKE_ERROR(MBED_MODULE_NETWORK_STACK, MBED_ERROR_CODE_FAILED_OPERATION), "sys_mutex_new error\n", (u32_t)mutex); return ERR_MEM; } - + return ERR_OK; } @@ -521,7 +510,7 @@ static sys_thread_data_t thread_pool[SYS_THREAD_POOL_N]; *---------------------------------------------------------------------------*/ #ifndef MBED_TZ_DEFAULT_ACCESS #define MBED_TZ_DEFAULT_ACCESS 0 -#endif +#endif sys_thread_t sys_thread_new(const char *pcName, void (*thread)(void *arg), @@ -547,7 +536,7 @@ static sys_thread_data_t thread_pool[SYS_THREAD_POOL_N]; t->id = osThreadNew((osThreadFunc_t)thread, arg, &t->attr); if (t->id == NULL) MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_NETWORK_STACK, MBED_ERROR_CODE_THREAD_CREATE_FAILED), "sys_thread_new create error\n"); - + return t; } diff --git a/connectivity/lwipstack/mbed_lib.json5 b/connectivity/lwipstack/mbed_lib.json5 index 9665e300fd9..343d3c9ae47 100644 --- a/connectivity/lwipstack/mbed_lib.json5 +++ b/connectivity/lwipstack/mbed_lib.json5 @@ -163,10 +163,7 @@ "Freescale": { "mem-size": 33270 }, - "LPC1768": { - "mem-size": 16362 - }, - "ARCH_PRO": { + "MCU_LPC17XX": { "mem-size": 16362 }, "LPC546XX": { diff --git a/hal/tests/TESTS/mbed_hal/common_tickers/main.cpp b/hal/tests/TESTS/mbed_hal/common_tickers/main.cpp index dd39c773a28..148e703a809 100644 --- a/hal/tests/TESTS/mbed_hal/common_tickers/main.cpp +++ b/hal/tests/TESTS/mbed_hal/common_tickers/main.cpp @@ -278,8 +278,9 @@ void ticker_disable_test() intf->set_interrupt(intf->read() + ticksFor100us); intf->disable_interrupt(); - // Verify that it does not fire - wait_us(200); + // Verify that it does not fire. Note that we cannot use wait_us here as it uses the us ticker + // which is currently suspended. + wait_ns(200000); TEST_ASSERT_EQUAL_INT(0, intFlag); // Now reset the interrupt again. @@ -289,11 +290,11 @@ void ticker_disable_test() TEST_ASSERT_EQUAL_INT_MESSAGE(0, intFlag, "Ticker fired during set_interrupt() while disabled! Check that set_interrupt() function clears pending timer compare."); // Still not yet - wait_us(20); + wait_ns(20000); TEST_ASSERT_EQUAL_INT(0, intFlag); // NOW it should have fired - wait_us(170); + wait_ns(170000); TEST_ASSERT_EQUAL_INT(1, intFlag); } diff --git a/targets/TARGET_NXP/CMakeLists.txt b/targets/TARGET_NXP/CMakeLists.txt index e519a4453d7..783926ae8bb 100644 --- a/targets/TARGET_NXP/CMakeLists.txt +++ b/targets/TARGET_NXP/CMakeLists.txt @@ -2,7 +2,7 @@ # SPDX-License-Identifier: Apache-2.0 add_subdirectory(TARGET_LPC11XX_11CXX EXCLUDE_FROM_ALL) -add_subdirectory(TARGET_LPC176X EXCLUDE_FROM_ALL) +add_subdirectory(TARGET_LPC17XX EXCLUDE_FROM_ALL) add_subdirectory(TARGET_MCUXpresso_MCUS EXCLUDE_FROM_ALL) add_library(mbed-nxp INTERFACE) diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/reserved_pins.h b/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/reserved_pins.h deleted file mode 100644 index b392cd2f21c..00000000000 --- a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/reserved_pins.h +++ /dev/null @@ -1,8 +0,0 @@ -// List of reserved pins for MBED LPC1768 - -#ifndef RESERVED_PINS_H -#define RESERVED_PINS_H - -#define TARGET_RESERVED_PINS {} - -#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/reserved_pins.h b/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/reserved_pins.h deleted file mode 100644 index b392cd2f21c..00000000000 --- a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/reserved_pins.h +++ /dev/null @@ -1,8 +0,0 @@ -// List of reserved pins for MBED LPC1768 - -#ifndef RESERVED_PINS_H -#define RESERVED_PINS_H - -#define TARGET_RESERVED_PINS {} - -#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/CMakeLists.txt b/targets/TARGET_NXP/TARGET_LPC17XX/CMakeLists.txt similarity index 76% rename from targets/TARGET_NXP/TARGET_LPC176X/CMakeLists.txt rename to targets/TARGET_NXP/TARGET_LPC17XX/CMakeLists.txt index e5ff520e079..f56be84a76f 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/CMakeLists.txt +++ b/targets/TARGET_NXP/TARGET_LPC17XX/CMakeLists.txt @@ -3,8 +3,9 @@ add_subdirectory(TARGET_ARCH_PRO EXCLUDE_FROM_ALL) add_subdirectory(TARGET_MBED_LPC1768 EXCLUDE_FROM_ALL) +add_subdirectory(TARGET_LPCXPRESSO_LPC1769 EXCLUDE_FROM_ALL) -add_library(mbed-lpc176x INTERFACE) +add_library(mbed-lpc17xx INTERFACE) if(${MBED_TOOLCHAIN} STREQUAL "ARM") set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_LPC17xx.S) @@ -14,13 +15,13 @@ elseif(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/LPC1768.ld) endif() -target_include_directories(mbed-lpc176x +target_include_directories(mbed-lpc17xx INTERFACE . device ) -target_sources(mbed-lpc176x +target_sources(mbed-lpc17xx INTERFACE analogin_api.c analogout_api.c @@ -45,7 +46,6 @@ target_sources(mbed-lpc176x ${STARTUP_FILE} ) -target_link_libraries(mbed-lpc176x INTERFACE mbed-nxp) +target_link_libraries(mbed-lpc17xx INTERFACE mbed-nxp) -mbed_set_linker_script(mbed-arch-pro ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) -mbed_set_linker_script(mbed-lpc1768 ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) +mbed_set_linker_script(mbed-lpc17xx ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE}) \ No newline at end of file diff --git a/targets/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h b/targets/TARGET_NXP/TARGET_LPC17XX/PeripheralNames.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h rename to targets/TARGET_NXP/TARGET_LPC17XX/PeripheralNames.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/PeripheralPinMaps.h b/targets/TARGET_NXP/TARGET_LPC17XX/PeripheralPinMaps.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/PeripheralPinMaps.h rename to targets/TARGET_NXP/TARGET_LPC17XX/PeripheralPinMaps.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/PortNames.h b/targets/TARGET_NXP/TARGET_LPC17XX/PortNames.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/PortNames.h rename to targets/TARGET_NXP/TARGET_LPC17XX/PortNames.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/CMakeLists.txt b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/CMakeLists.txt similarity index 82% rename from targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/CMakeLists.txt rename to targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/CMakeLists.txt index 2bb1beb36fc..12b7a60040b 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/CMakeLists.txt +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/CMakeLists.txt @@ -10,6 +10,6 @@ target_include_directories(mbed-arch-pro . ) -target_link_libraries(mbed-arch-pro INTERFACE mbed-lpc176x) +target_link_libraries(mbed-arch-pro INTERFACE mbed-lpc17xx) mbed_post_build_lpc_patch_vtable("ARCH_PRO") diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/PinNames.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/PinNames.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/PinNames.h rename to targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/PinNames.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/device.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/device.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/TARGET_ARCH_PRO/device.h rename to targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/device.h diff --git a/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/reserved_pins.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/reserved_pins.h new file mode 100644 index 00000000000..02c9a10a30e --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_ARCH_PRO/reserved_pins.h @@ -0,0 +1,25 @@ +// List of reserved pins for MBED LPC1768 + +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef RESERVED_PINS_H +#define RESERVED_PINS_H + +#define TARGET_RESERVED_PINS {} + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/CMakeLists.txt b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/CMakeLists.txt new file mode 100644 index 00000000000..7543cf9c525 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/CMakeLists.txt @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Johannes Stratmann. +# SPDX-License-Identifier: Apache-2.0 + +include(mbed_set_post_build_nxp) + +add_library(mbed-lpcxpresso-lpc1769 INTERFACE) + +target_include_directories(mbed-lpcxpresso-lpc1769 + INTERFACE + . +) + +target_link_libraries(mbed-lpcxpresso-lpc1769 INTERFACE mbed-lpc17xx) + +mbed_post_build_lpc_patch_vtable("LPC1768") diff --git a/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/PinNames.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/PinNames.h new file mode 100644 index 00000000000..44d4256bb43 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/PinNames.h @@ -0,0 +1,127 @@ +/* mbed Microcontroller Library + * Copyright (c) 2025 Johannes Stratmann + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* MBED TARGET LIST: LPC1768 */ + +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + PIN_INPUT, + PIN_OUTPUT +} PinDirection; + +/* If this macro is defined, you can use constexpr utility functions for pin map search. */ +#define STATIC_PINMAP_READY 1 + +#define PORT_SHIFT 5 + +typedef enum { + // LPC Pin Names + P0_0 = LPC_GPIO0_BASE, + P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31, + P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31, + P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31, + P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31, + P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31, + + // mbed DIP Pin Names. + // Note that this board is compatible with the Mbed DIP form factor, though it also has additional headers + // for pins that aren't broken out on the Mbed LPC1768. + p5 = P0_9, + p6 = P0_8, + p7 = P0_7, + p8 = P0_6, + p9 = P0_0, + p10 = P0_1, + p11 = P0_18, + p12 = P0_17, + p13 = P0_15, + p14 = P0_16, + p15 = P0_23, + p16 = P0_24, + p17 = P0_25, + p18 = P0_26, + p19 = P1_30, + p20 = P1_31, + p21 = P2_5, + p22 = P2_4, + p23 = P2_3, + p24 = P2_2, + p25 = P2_1, + p26 = P2_0, + p27 = P0_11, + p28 = P0_10, + p29 = P0_5, + p30 = P0_4, + + CONSOLE_TX = P0_2, + CONSOLE_RX = P0_3, + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +// Standard buttons and LEDs +#define LED1 P0_22 // LED1 RGB red +#define LED2 P3_26 // LED1 RGB blue +#define LED3 P3_25 // LED1 RGB green + +#define LED_RED LED1 +#define LED_BLUE LED2 +#define LED_GREEN LED3 + +// I2C pin names +#define I2C_SCL0 P0_28 // ext. pull-up 2k2 onboard +#define I2C_SDA0 P0_27 // ext. pull-up 2k2 onboard +#define I2C_SCL1 p10 +#define I2C_SDA1 p9 +#define I2C_SCL2 P0_11 +#define I2C_SDA2 P0_10 +#define I2C_SCL I2C_SCL0 +#define I2C_SDA I2C_SDA0 + +typedef enum { + PullUp = 0, + PullDown = 3, + PullNone = 2, + Repeater = 1, + OpenDrain = 4, + PullDefault = PullDown +} PinMode; + +// version of PINCON_TypeDef using register arrays +typedef struct { + __IO uint32_t PINSEL[11]; + uint32_t RESERVED0[5]; + __IO uint32_t PINMODE[10]; + __IO uint32_t PINMODE_OD[5]; +} PINCONARRAY_TypeDef; + +#define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE) + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/device.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/device.h new file mode 100644 index 00000000000..4f182ba1dc0 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/device.h @@ -0,0 +1,28 @@ +// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches. +// Check the 'features' section of the target description in 'targets.json' for more details. + +/* mbed Microcontroller Library + * Copyright (c) 2025 Johannes Stratmann + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_DEVICE_H +#define MBED_DEVICE_H + +#define DEVICE_ID_LENGTH 32 +#define DEVICE_MAC_OFFSET 20 + +#include "objects.h" + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/reserved_pins.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/reserved_pins.h new file mode 100644 index 00000000000..27c287db8b3 --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_LPCXPRESSO_LPC1769/reserved_pins.h @@ -0,0 +1,23 @@ +/* mbed Microcontroller Library + * Copyright (c) 2025 Johannes Stratmann + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef RESERVED_PINS_H +#define RESERVED_PINS_H + +#define TARGET_RESERVED_PINS {} + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/CMakeLists.txt b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/CMakeLists.txt similarity index 52% rename from targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/CMakeLists.txt rename to targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/CMakeLists.txt index 6ccf742880f..1b8b1997456 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/CMakeLists.txt +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/CMakeLists.txt @@ -3,17 +3,13 @@ include(mbed_set_post_build_nxp) -add_library(mbed-mbed-lpc1768 INTERFACE) +add_library(mbed-lpc1768 INTERFACE) -target_include_directories(mbed-mbed-lpc1768 +target_include_directories(mbed-lpc1768 INTERFACE . ) -target_link_libraries(mbed-mbed-lpc1768 INTERFACE mbed-lpc176x) - -add_library(mbed-lpc1768 INTERFACE) - -target_link_libraries(mbed-lpc1768 INTERFACE mbed-mbed-lpc1768) +target_link_libraries(mbed-lpc1768 INTERFACE mbed-lpc17xx) mbed_post_build_lpc_patch_vtable("LPC1768") diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/PinNames.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/PinNames.h rename to targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/PinNames.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/device.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/device.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/TARGET_MBED_LPC1768/device.h rename to targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/device.h diff --git a/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/reserved_pins.h b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/reserved_pins.h new file mode 100644 index 00000000000..02c9a10a30e --- /dev/null +++ b/targets/TARGET_NXP/TARGET_LPC17XX/TARGET_MBED_LPC1768/reserved_pins.h @@ -0,0 +1,25 @@ +// List of reserved pins for MBED LPC1768 + +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef RESERVED_PINS_H +#define RESERVED_PINS_H + +#define TARGET_RESERVED_PINS {} + +#endif diff --git a/targets/TARGET_NXP/TARGET_LPC176X/analogin_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/analogin_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/analogin_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/analogin_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/analogout_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/analogout_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/analogout_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/analogout_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/can_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/can_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/can_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/can_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/CRP.c b/targets/TARGET_NXP/TARGET_LPC17XX/device/CRP.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/device/CRP.c rename to targets/TARGET_NXP/TARGET_LPC17XX/device/CRP.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/LPC17xx.h b/targets/TARGET_NXP/TARGET_LPC17XX/device/LPC17xx.h similarity index 99% rename from targets/TARGET_NXP/TARGET_LPC176X/device/LPC17xx.h rename to targets/TARGET_NXP/TARGET_LPC17XX/device/LPC17xx.h index 377fdf240af..9922abcba12 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/LPC17xx.h +++ b/targets/TARGET_NXP/TARGET_LPC17XX/device/LPC17xx.h @@ -21,6 +21,8 @@ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * + * SPDX-License-Identifier: LicenseRef-scancode-arm-cortex-mx + * ******************************************************************************/ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld b/targets/TARGET_NXP/TARGET_LPC17XX/device/TOOLCHAIN_GCC_ARM/LPC1768.ld similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld rename to targets/TARGET_NXP/TARGET_LPC17XX/device/TOOLCHAIN_GCC_ARM/LPC1768.ld diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/startup_LPC17xx.S b/targets/TARGET_NXP/TARGET_LPC17XX/device/TOOLCHAIN_GCC_ARM/startup_LPC17xx.S similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/startup_LPC17xx.S rename to targets/TARGET_NXP/TARGET_LPC17XX/device/TOOLCHAIN_GCC_ARM/startup_LPC17xx.S diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/cmsis.h b/targets/TARGET_NXP/TARGET_LPC17XX/device/cmsis.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/device/cmsis.h rename to targets/TARGET_NXP/TARGET_LPC17XX/device/cmsis.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/cmsis_nvic.h b/targets/TARGET_NXP/TARGET_LPC17XX/device/cmsis_nvic.h similarity index 97% rename from targets/TARGET_NXP/TARGET_LPC176X/device/cmsis_nvic.h rename to targets/TARGET_NXP/TARGET_LPC17XX/device/cmsis_nvic.h index 185a6436741..9938793329f 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/cmsis_nvic.h +++ b/targets/TARGET_NXP/TARGET_LPC17XX/device/cmsis_nvic.h @@ -2,6 +2,7 @@ ******************************************************************************* * Copyright (c) 2011 ARM Limited. All rights reserved. * All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/flash_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/device/flash_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/device/flash_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/device/flash_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/system_LPC17xx.c b/targets/TARGET_NXP/TARGET_LPC17XX/device/system_LPC17xx.c similarity index 93% rename from targets/TARGET_NXP/TARGET_LPC176X/device/system_LPC17xx.c rename to targets/TARGET_NXP/TARGET_LPC17XX/device/system_LPC17xx.c index c86e32ca02d..20de4098162 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/system_LPC17xx.c +++ b/targets/TARGET_NXP/TARGET_LPC17XX/device/system_LPC17xx.c @@ -20,11 +20,14 @@ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * + * SPDX-License-Identifier: LicenseRef-scancode-arm-cortex-mx + * ******************************************************************************/ #include #include "LPC17xx.h" +#include "mbed-target-config.h" /** @addtogroup LPC17xx_System @@ -297,20 +300,28 @@ #define CLKSRCSEL_Val 0x00000001 #define PLL0_SETUP 1 -#ifdef MCB1700 -# define PLL0CFG_Val 0x00050063 -# define PLL1_SETUP 1 -# define PLL1CFG_Val 0x00000023 -# define CCLKCFG_Val 0x00000003 -# define USBCLKCFG_Val 0x00000000 +// If in 120MHz mode, clock the PLL at 480MHz as this is the only frequency that can give us both 120MHz for the core +// and 48MHz for USB. +#if MBED_CONF_TARGET_LPC17XX_CORE_CLK_120MHZ + // Multiplier for PLL0. Example: if MBED_CONF_TARGET_LPC17XX_XTAL_FREQ is 6MHz, this will be 40 +# define PLL0_MULTIPLIER (240000000/MBED_CONF_TARGET_LPC17XX_XTAL_FREQ) +# define PLL0CFG_Val (PLL0_MULTIPLIER-1) // PLL0 clock = * * 2 / 1 = 480MHz +# define CCLKCFG_Val 0x00000003 // CPU clock = PLL0 clock / 4 = 120MHz + +# define USBCLKCFG_Val 0x00000009 // USB clock = PLL0 clock / 10 = 48MHz #else -# define PLL0CFG_Val 0x0000000B -# define PLL1_SETUP 0 -# define PLL1CFG_Val 0x00000000 -# define CCLKCFG_Val 0x00000002 -# define USBCLKCFG_Val 0x00000005 + // Multiplier for PLL0. Example: if MBED_CONF_TARGET_LPC17XX_XTAL_FREQ is 6MHz, this will be 24 +# define PLL0_MULTIPLIER (144000000/MBED_CONF_TARGET_LPC17XX_XTAL_FREQ) +# define PLL0CFG_Val (PLL0_MULTIPLIER-1) // PLL0 clock = * * 2 / 1 = 288MHz +# define CCLKCFG_Val 0x00000002 // CPU clock = PLL0 clock / 3 = 96MHz + +# define USBCLKCFG_Val 0x00000005 // USB clock = PLL0 clock / 6 = 48MHz #endif +// Don't enable PLL1. It is much more limited in input frequency and only acceps 10-24MHz. +#define PLL1_SETUP 0 +#define PLL1CFG_Val 0x00000000 + #define PCLKSEL0_Val 0x00000000 #define PCLKSEL1_Val 0x00000000 #define PCONP_Val 0x042887DE @@ -402,8 +413,7 @@ /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ -#define XTAL (12000000UL) /* Oscillator frequency */ -#define OSC_CLK ( XTAL) /* Main oscillator frequency */ +#define OSC_CLK MBED_CONF_TARGET_LPC17XX_XTAL_FREQ /* Main oscillator frequency */ #define RTC_CLK ( 32000UL) /* RTC oscillator frequency */ #define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/system_LPC17xx.h b/targets/TARGET_NXP/TARGET_LPC17XX/device/system_LPC17xx.h similarity index 96% rename from targets/TARGET_NXP/TARGET_LPC176X/device/system_LPC17xx.h rename to targets/TARGET_NXP/TARGET_LPC17XX/device/system_LPC17xx.h index c8e522f0bc4..7604ffc4545 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/system_LPC17xx.h +++ b/targets/TARGET_NXP/TARGET_LPC17XX/device/system_LPC17xx.h @@ -18,6 +18,8 @@ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. * + * SPDX-License-Identifier: LicenseRef-scancode-arm-cortex-mx + * ******************************************************************************/ diff --git a/targets/TARGET_NXP/TARGET_LPC176X/gpio_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/gpio_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/gpio_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/gpio_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/gpio_irq_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/gpio_irq_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/gpio_object.h b/targets/TARGET_NXP/TARGET_LPC17XX/gpio_object.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/gpio_object.h rename to targets/TARGET_NXP/TARGET_LPC17XX/gpio_object.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/i2c_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/i2c_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/i2c_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/objects.h b/targets/TARGET_NXP/TARGET_LPC17XX/objects.h similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/objects.h rename to targets/TARGET_NXP/TARGET_LPC17XX/objects.h diff --git a/targets/TARGET_NXP/TARGET_LPC176X/pinmap.c b/targets/TARGET_NXP/TARGET_LPC17XX/pinmap.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/pinmap.c rename to targets/TARGET_NXP/TARGET_LPC17XX/pinmap.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/port_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/port_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/port_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/port_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/pwmout_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/pwmout_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/pwmout_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/pwmout_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/reset_reason.c b/targets/TARGET_NXP/TARGET_LPC17XX/reset_reason.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/reset_reason.c rename to targets/TARGET_NXP/TARGET_LPC17XX/reset_reason.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/rtc_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/rtc_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/rtc_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/rtc_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/serial_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/serial_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/serial_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/serial_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/sleep.c b/targets/TARGET_NXP/TARGET_LPC17XX/sleep.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/sleep.c rename to targets/TARGET_NXP/TARGET_LPC17XX/sleep.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/spi_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/spi_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/spi_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/spi_api.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/us_ticker.c b/targets/TARGET_NXP/TARGET_LPC17XX/us_ticker.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/us_ticker.c rename to targets/TARGET_NXP/TARGET_LPC17XX/us_ticker.c diff --git a/targets/TARGET_NXP/TARGET_LPC176X/watchdog_api.c b/targets/TARGET_NXP/TARGET_LPC17XX/watchdog_api.c similarity index 100% rename from targets/TARGET_NXP/TARGET_LPC176X/watchdog_api.c rename to targets/TARGET_NXP/TARGET_LPC17XX/watchdog_api.c diff --git a/targets/TARGET_NXP/USBHAL_LPC17.cpp b/targets/TARGET_NXP/USBHAL_LPC17.cpp index 67dca07de11..bcf49a718dc 100644 --- a/targets/TARGET_NXP/USBHAL_LPC17.cpp +++ b/targets/TARGET_NXP/USBHAL_LPC17.cpp @@ -16,7 +16,7 @@ */ #if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \ - (defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC2460)) + (defined(TARGET_LPC17XX)) #include "USBEndpoints_LPC17_LPC23.h" #include "USBPhyHw.h" diff --git a/targets/TARGET_NXP/mbed_rtx.h b/targets/TARGET_NXP/mbed_rtx.h index 8d777fdaa64..74af41cac4c 100644 --- a/targets/TARGET_NXP/mbed_rtx.h +++ b/targets/TARGET_NXP/mbed_rtx.h @@ -42,7 +42,7 @@ #define INITIAL_SP (0x10001000UL) #endif -#elif defined(TARGET_LPC1768) +#elif defined(TARGET_LPC17XX) #ifndef INITIAL_SP #define INITIAL_SP (0x10008000UL) diff --git a/targets/cmsis_mcu_descriptions.json5 b/targets/cmsis_mcu_descriptions.json5 index dfb6c2f75d2..621a3c0d457 100644 --- a/targets/cmsis_mcu_descriptions.json5 +++ b/targets/cmsis_mcu_descriptions.json5 @@ -1591,6 +1591,93 @@ "sub_family": "LPC176x", "vendor": "NXP:11" }, + "LPC1769": { + "algorithms": [ + { + "default": true, + "file_name": "Flash/LPC_IAP_512.FLM", + "ram_size": 4064, + "ram_start": 268435456, + "size": 524288, + "start": 0 + } + ], + "family": "LPC1700 Series", + "from_pack": { + "pack": "LPC1700_DFP", + "url": "http://www.keil.com/pack/", + "vendor": "Keil", + "version": "2.5.0" + }, + "memories": { + "IRAM1": { + "access": { + "execute": false, + "non_secure": false, + "non_secure_callable": false, + "peripheral": false, + "read": true, + "secure": false, + "write": true + }, + "default": true, + "size": 32768, + "start": 268435456, + "startup": false + }, + "IRAM2": { + "access": { + "execute": false, + "non_secure": false, + "non_secure_callable": false, + "peripheral": false, + "read": true, + "secure": false, + "write": true + }, + "default": true, + "size": 32768, + "start": 537378816, + "startup": false + }, + "IROM1": { + "access": { + "execute": true, + "non_secure": false, + "non_secure_callable": false, + "peripheral": false, + "read": true, + "secure": false, + "write": false + }, + "default": true, + "size": 524288, + "start": 0, + "startup": true + } + }, + "name": "LPC1769", + "processor": { + "Symmetric": { + "core": "CortexM3", + "fpu": "None", + "mpu": "Present", + "units": 1 + } + }, + "sectors": [ + [ + 0, + 4096 + ], + [ + 65536, + 32768 + ] + ], + "sub_family": "LPC176x", + "vendor": "NXP:11" + }, "LPC54114J256BD64": { "algorithms": [ { @@ -15180,4 +15267,4 @@ }, "vendor": "Raspberry Pi:x" } -} \ No newline at end of file +} diff --git a/targets/drivers.json5 b/targets/drivers.json5 index fe8a148ea5e..05ba0ae5f5c 100644 --- a/targets/drivers.json5 +++ b/targets/drivers.json5 @@ -246,6 +246,10 @@ "description": "Controller Area Network (CAN) peripheral driver", "friendly_name": "CAN" }, + "DEVICE_CAN_FD": { + "description": "CAN Flexible Datarate (FD) support in CAN driver", + "friendly_name": "CAN FD" + }, // mystery ARM feature, used only on reference designs (SPI related?) "DEVICE_CLCD": { "description": "", diff --git a/targets/targets.json5 b/targets/targets.json5 index 7a77107ca5f..20c795df20f 100644 --- a/targets/targets.json5 +++ b/targets/targets.json5 @@ -405,21 +405,21 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", ], "image_url": "https://os.mbed.com/media/cache/platforms/LPC1114_1_hXXAnmW.jpg.250x250_q85.jpg" }, - "MCU_LPC1768": { + "MCU_LPC17XX": { "inherits": [ "LPCTarget" ], "public": false, "core": "Cortex-M3", - "extra_labels": [ + "extra_labels_add": [ "NXP", - "LPC176X", + "LPC17XX", "NXP_EMAC" ], "supported_toolchains": [ "GCC_ARM" ], - "macros": [ + "macros_add": [ "MBED_SPLIT_HEAP" ], "device_has": [ @@ -451,12 +451,19 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", "release_versions": [ "5" ], - "device_name": "LPC1768", "bootloader_supported": true, "config": { "us-ticker-timer": { "help": "Chooses which timer (0-3) to use for us_ticker.c", "value": 3 + }, + "lpc17xx-xtal-freq": { + help: "Frequency of external crystal or clock source connected to the XTAL pins. Frequency in MHz must be an integer factor of 24 (e.g. 12MHz, 6MHz, and 1MHz are OK but 5MHz is not).", + value: 12000000 + }, + "lpc17xx-core-clk-120mhz": { + help: "If true, the core will be clocked at 120MHz. Otherwise, it will be clocked at 96MHz. This is only officially supported with LPC1759/69 chips, but can work with others as an overclock.", + value: false } }, "overrides": { @@ -477,12 +484,12 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", }, "LPC1768": { "inherits": [ - "MCU_LPC1768" + "MCU_LPC17XX" ], - "core": "Cortex-M3", "extra_labels_add": [ "MBED_LPC1768", ], + "device_name": "LPC1768", "detect_code": [ "1010" ], @@ -494,21 +501,28 @@ mode is recommended for target MCUs with small amounts of flash and RAM.", }, "image_url": "https://os.mbed.com/media/cache/platforms/LPC1768.jpg.250x250_q85.jpg" }, - "ARCH_PRO": { - "supported_form_factors": [ - "ARDUINO" - ], - "extra_labels": [ - "NXP", - "LPC176X", - "NXP_EMAC" + "LPCXPRESSO_LPC1769": { // AKA LPCXpresso LPC1769 (OM13000). CMSIS-DAP version (OM13085UL) should also work. + "inherits": [ + "MCU_LPC17XX" ], - "macros": [ - "TARGET_LPC1768" + "device_name": "LPC1769", + "components_add": [ + "COMPONENT_I2CEE" ], + "overrides": { + "default-adc-vref": 3.3, // Vref is 3.3V + "lpc17xx-core-clk-120mhz": true + }, + "image_url": "https://www.embeddedartists.com/wp-content/uploads/2018/06/lpc1769_xpr_540x333-540x333.png" + }, + "ARCH_PRO": { "inherits": [ - "MCU_LPC1768" + "MCU_LPC17XX" ], + "device_name": "LPC1768", + // "supported_form_factors": [ + // "ARDUINO_UNO" + // ], "detect_code": [ "9004" ], diff --git a/targets/upload_method_cfg/LPC1768.cmake b/targets/upload_method_cfg/LPC1768.cmake index 0a0019fd3f3..248633964b3 100644 --- a/targets/upload_method_cfg/LPC1768.cmake +++ b/targets/upload_method_cfg/LPC1768.cmake @@ -37,11 +37,10 @@ set(OPENOCD_UPLOAD_ENABLED TRUE) set(OPENOCD_CHIP_CONFIG_COMMANDS -f ${CMAKE_CURRENT_LIST_DIR}/openocd_cfgs/lpc1768.cfg) -# For some reason, as of summer 2024, git version of OpenOCD does not work with LPC1768. So, it seems like -# the last compatible version will be the current release 0.12. +# Due to the new quirks mode, as of summer 2024, git version of OpenOCD does not work with LPC1768. set(OPENOCD_VERSION_RANGE 0.10...<0.13) # Config options for LINKSERVER # ------------------------------------------------------------- set(LINKSERVER_UPLOAD_ENABLED TRUE) -set(LINKSERVER_DEVICE LPC1768) \ No newline at end of file +set(LINKSERVER_DEVICE LPC1768) diff --git a/targets/upload_method_cfg/LPCXPRESSO_LPC1769.cmake b/targets/upload_method_cfg/LPCXPRESSO_LPC1769.cmake new file mode 100644 index 00000000000..824dc08f1ad --- /dev/null +++ b/targets/upload_method_cfg/LPCXPRESSO_LPC1769.cmake @@ -0,0 +1,51 @@ +# Mbed OS upload method configuration file for target Embedded Artists LPCXPRESSO_LPC1768. +# To change any of these parameters from their default values, set them in your build script between where you +# include app.cmake and where you add mbed os as a subdirectory. + +# General config parameters +# ------------------------------------------------------------- +set(UPLOAD_METHOD_DEFAULT PYOCD) + +# Config options for MBED +# ------------------------------------------------------------- + +set(MBED_UPLOAD_ENABLED TRUE) +set(MBED_RESET_BAUDRATE 115200) + +# Config options for PYOCD +# ------------------------------------------------------------- + +# Recent PyOCD (>= 0.11) does not appear to be able to talk to LPC1768 +# https://github.com/pyocd/pyOCD/issues/745 +# https://github.com/pyocd/pyOCD/issues/1124 + +set(PYOCD_UPLOAD_ENABLED TRUE) +set(PYOCD_TARGET_NAME LPC1768) +set(PYOCD_CLOCK_SPEED 4000k) + +# Config options for OPENOCD +# ------------------------------------------------------------- + +# One note about OpenOCD for LPC176: +# If you issue a "monitor reset" command, GDB will think that the program is halted, but it actually will have +# resumed. So, issue a "c" command after "monitor reset" to get things synchronized again. + +set(OPENOCD_UPLOAD_ENABLED TRUE) +set(OPENOCD_CHIP_CONFIG_COMMANDS + -f ${CMAKE_CURRENT_LIST_DIR}/openocd_cfgs/lpc1768.cfg) + +# Due to the new quirks mode, as of summer 2024, git version of OpenOCD does not work with LPC1768. +set(OPENOCD_VERSION_RANGE 0.10...<0.13) + +# Config options for LINKSERVER +# ------------------------------------------------------------- +set(LINKSERVER_UPLOAD_ENABLED TRUE) +set(LINKSERVER_DEVICE LPC1769) + +# Config options for JLINK +# ------------------------------------------------------------- +set(JLINK_UPLOAD_ENABLED TRUE) +set(JLINK_CPU_NAME LPC1769) +set(JLINK_CLOCK_SPEED 4000) +set(JLINK_UPLOAD_INTERFACE SWD) + diff --git a/tools/cmake/upload_methods/UploadMethodJLINK.cmake b/tools/cmake/upload_methods/UploadMethodJLINK.cmake index 11ae4c78046..0157e3b9ace 100644 --- a/tools/cmake/upload_methods/UploadMethodJLINK.cmake +++ b/tools/cmake/upload_methods/UploadMethodJLINK.cmake @@ -39,7 +39,7 @@ endif() option(JLINK_NO_GUI "If true, suppress GUI dialog boxes from the J-Link software. Note: does not suppress license dialogs from J-Link EDU and On-Board probes, these are intentionally impossible to disable." FALSE) if(JLINK_NO_GUI) - set(JLINK_NOGUI_ARG -Nogui CACHE INTERNAL "" FORCE) + set(JLINK_NOGUI_ARG "-NoGui 1" CACHE INTERNAL "" FORCE) else() set(JLINK_NOGUI_ARG "" CACHE INTERNAL "" FORCE) endif() @@ -53,7 +53,11 @@ function(gen_upload_target TARGET_NAME BINARY_FILE) # Note: loadfile currently only honors the base address for .bin files. For hex files it uses the offset read # from the hex file. Unsure if that will be an issue or not... file(GENERATE OUTPUT ${COMMAND_FILE_PATH} CONTENT -"loadfile ${BINARY_FILE} ${MBED_UPLOAD_BASE_ADDR} +" +JTAGConf -1,-1 +ExitOnError 1 +connect +loadfile ${BINARY_FILE} ${MBED_UPLOAD_BASE_ADDR} r go exit @@ -62,13 +66,11 @@ exit COMMENT "Flashing ${TARGET_NAME} with J-Link..." COMMAND ${JLINK} ${JLINK_SELECT_ARG} - ${JLINK_NOGUI_ARG} -Device \"${JLINK_CPU_NAME}\" -Speed ${JLINK_CLOCK_SPEED} -if ${JLINK_UPLOAD_INTERFACE} - -JTAGConf -1,-1 - -AutoConnect 1 - -ExitOnError + -AutoConnect 1 + -NoGui 1 -CommandFile ${COMMAND_FILE_PATH}) endfunction(gen_upload_target) @@ -102,4 +104,4 @@ set(UPLOAD_LAUNCH_COMMANDS set(UPLOAD_RESTART_COMMANDS "monitor halt" "monitor reset" -) \ No newline at end of file +) diff --git a/tools/python/scancode_evaluate/scancode_evaluate.py b/tools/python/scancode_evaluate/scancode_evaluate.py index 0c31eb920ff..ea581d05544 100644 --- a/tools/python/scancode_evaluate/scancode_evaluate.py +++ b/tools/python/scancode_evaluate/scancode_evaluate.py @@ -100,6 +100,8 @@ def has_exempted_spdx_identifier(scanned_file_content): return True if spdx_find_result[0] == "LicenseRef-PBL": return True + if spdx_find_result[0] == "LicenseRef-scancode-arm-cortex-mx": + return True else: return False else: