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max32625_hic: Optimization of GPIO drive (ARMmbed#875)
Signed-off-by: Sadik.Ozer <[email protected]>
1 parent d073af1 commit baa0310

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3 files changed

+59
-129
lines changed

‎source/hic_hal/maxim/max32625/DAP_config.h‎

Lines changed: 21 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -207,33 +207,20 @@ Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:
207207
*/
208208
__STATIC_INLINE void PORT_SWD_SETUP (void)
209209
{
210-
uint32_t out_mode;
211-
212210
// Ensure that the GPIO clock is enabled
213211
if (MXC_CLKMAN->sys_clk_ctrl_6_gpio == MXC_V_CLKMAN_CLK_SCALE_DISABLED) {
214212
MXC_CLKMAN->sys_clk_ctrl_6_gpio = MXC_V_CLKMAN_CLK_SCALE_DIV_1;
215213
}
216214

217215
// Initial state
218-
MXC_GPIO->out_val[swclk_port] |= (1 << swclk_pin);
219-
MXC_GPIO->out_val[swdio_port] |= (1 << swdio_pin);
220-
MXC_GPIO->out_val[nreset_port] |= (1 << nreset_pin);
216+
MXC_GPIO_SETBIT(swclk_port, swclk_pin);
217+
MXC_GPIO_SETBIT(swdio_port, swdio_pin);
218+
MXC_GPIO_SETBIT(nreset_port, nreset_pin);
221219

222220
// Output mode
223-
out_mode = MXC_GPIO->out_mode[swclk_port];
224-
out_mode &= ~(0xFU << (4 * swclk_pin));
225-
out_mode |= (MXC_V_GPIO_OUT_MODE_NORMAL << (4 * swclk_pin));
226-
MXC_GPIO->out_mode[swclk_port] = out_mode;
227-
228-
out_mode = MXC_GPIO->out_mode[swdio_port];
229-
out_mode &= ~(0xFU << (4 * swdio_pin));
230-
out_mode |= (MXC_V_GPIO_OUT_MODE_NORMAL << (4 * swdio_pin));
231-
MXC_GPIO->out_mode[swdio_port] = out_mode;
232-
233-
out_mode = MXC_GPIO->out_mode[nreset_port];
234-
out_mode &= ~(0xFU << (4 * nreset_pin));
235-
out_mode |= (MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << (4 * nreset_pin));
236-
MXC_GPIO->out_mode[nreset_port] = out_mode;
221+
MXC_GPIO_SETMODE(swclk_port, swclk_pin, MXC_V_GPIO_OUT_MODE_NORMAL);
222+
MXC_GPIO_SETMODE(swdio_port, swdio_pin, MXC_V_GPIO_OUT_MODE_NORMAL);
223+
MXC_GPIO_SETMODE(nreset_port, nreset_pin, MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP);
237224

238225
tck_in = (volatile uint32_t *)BITBAND(&MXC_GPIO->in_val[swclk_port], swclk_pin);
239226
tck_out = (volatile uint32_t *)BITBAND(&MXC_GPIO->out_val[swclk_port], swclk_pin);
@@ -249,28 +236,15 @@ Disables the DAP Hardware I/O pins which configures:
249236
*/
250237
__STATIC_INLINE void PORT_OFF (void)
251238
{
252-
uint32_t out_mode;
253-
254239
// Disable weak pullup in high-z output mode
255-
MXC_GPIO->out_val[swclk_port] &= ~(1 << swclk_pin);
256-
MXC_GPIO->out_val[swdio_port] &= ~(1 << swdio_pin);
257-
MXC_GPIO->out_val[nreset_port] &= ~(1 << nreset_pin);
240+
MXC_GPIO_CLRBIT(swclk_port, swclk_pin);
241+
MXC_GPIO_CLRBIT(swdio_port, swdio_pin);
242+
MXC_GPIO_CLRBIT(nreset_port, nreset_pin);
258243

259244
// High-z output mode
260-
out_mode = MXC_GPIO->out_mode[swclk_port];
261-
out_mode &= ~(0xFU << (4 * swclk_pin));
262-
out_mode |= (MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << (4 * swclk_pin));
263-
MXC_GPIO->out_mode[swclk_port] = out_mode;
264-
265-
out_mode = MXC_GPIO->out_mode[swdio_port];
266-
out_mode &= ~(0xFU << (4 * swdio_pin));
267-
out_mode |= (MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << (4 * swdio_pin));
268-
MXC_GPIO->out_mode[swdio_port] = out_mode;
269-
270-
out_mode = MXC_GPIO->out_mode[nreset_port];
271-
out_mode &= ~(0xFU << (4 * nreset_pin));
272-
out_mode |= (MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << (4 * nreset_pin));
273-
MXC_GPIO->out_mode[nreset_port] = out_mode;
245+
MXC_GPIO_SETMODE(swclk_port, swclk_pin, MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP);
246+
MXC_GPIO_SETMODE(swdio_port, swdio_pin, MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP);
247+
MXC_GPIO_SETMODE(nreset_port, nreset_pin, MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP);
274248
}
275249

276250
// SWCLK/TCK I/O pin -------------------------------------
@@ -347,12 +321,7 @@ called prior \ref PIN_SWDIO_OUT function calls.
347321
*/
348322
__STATIC_FORCEINLINE void PIN_SWDIO_OUT_ENABLE (void)
349323
{
350-
uint32_t out_mode;
351-
352-
out_mode = MXC_GPIO->out_mode[swdio_port];
353-
out_mode &= ~(0xFU << (4 * swdio_pin));
354-
out_mode |= (MXC_V_GPIO_OUT_MODE_NORMAL << (4 * swdio_pin));
355-
MXC_GPIO->out_mode[swdio_port] = out_mode;
324+
MXC_GPIO_SETMODE(swdio_port, swdio_pin, MXC_V_GPIO_OUT_MODE_NORMAL);
356325
}
357326

358327
/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only).
@@ -361,12 +330,8 @@ called prior \ref PIN_SWDIO_IN function calls.
361330
*/
362331
__STATIC_FORCEINLINE void PIN_SWDIO_OUT_DISABLE (void)
363332
{
364-
uint32_t out_mode;
365-
366-
out_mode = MXC_GPIO->out_mode[swdio_port];
367-
out_mode &= ~(0xFU << (4 * swdio_pin));
368-
MXC_GPIO->out_mode[swdio_port] = out_mode;
369-
MXC_GPIO->out_val[swdio_port] &= ~(1 << swdio_pin);
333+
MXC_GPIO_SETMODE(swdio_port, swdio_pin, MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z);
334+
MXC_GPIO_CLRBIT(swdio_port, swdio_pin);
370335
}
371336

372337
// TDI Pin I/O ---------------------------------------------
@@ -512,29 +477,16 @@ Status LEDs. In detail the operation of Hardware I/O and LED pins are enabled an
512477
*/
513478
__STATIC_INLINE void DAP_SETUP (void)
514479
{
515-
uint32_t out_mode;
516-
517480
// Weak pull-up disabled
518-
MXC_GPIO->out_val[swclk_port] &= ~(1 << swclk_pin);
519-
MXC_GPIO->out_val[swdio_port] &= ~(1 << swdio_pin);
481+
MXC_GPIO_CLRBIT(swclk_port, swclk_pin);
482+
MXC_GPIO_CLRBIT(swdio_port, swdio_pin);
520483
// Weak pull-up enabled
521-
MXC_GPIO->out_val[nreset_port] |= (1 << nreset_pin);
484+
MXC_GPIO_SETBIT(nreset_port, nreset_pin);
522485

523486
// High-Z output mode
524-
out_mode = MXC_GPIO->out_mode[swclk_port];
525-
out_mode &= ~(0xFU << (4 * swclk_pin));
526-
out_mode |= (MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << (4 * swclk_pin));
527-
MXC_GPIO->out_mode[swclk_port] = out_mode;
528-
529-
out_mode = MXC_GPIO->out_mode[swdio_port];
530-
out_mode &= ~(0xFU << (4 * swdio_pin));
531-
out_mode |= (MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << (4 * swdio_pin));
532-
MXC_GPIO->out_mode[swdio_port] = out_mode;
533-
534-
out_mode = MXC_GPIO->out_mode[nreset_port];
535-
out_mode &= ~(0xFU << (4 * nreset_pin));
536-
out_mode |= (MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP << (4 * nreset_pin));
537-
MXC_GPIO->out_mode[nreset_port] = out_mode;
487+
MXC_GPIO_SETMODE(swclk_port, swclk_pin, MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP);
488+
MXC_GPIO_SETMODE(swdio_port, swdio_pin, MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP);
489+
MXC_GPIO_SETMODE(nreset_port, nreset_pin, MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP);
538490
}
539491

540492
/** Reset Target Device with custom specific I/O pin or command sequence.

‎source/hic_hal/maxim/max32625/IO_Config.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,4 +102,9 @@ typedef enum {
102102
#define CDC_ACM_UART_SWD 2
103103
#define CDC_ACM_UART_DIP 0
104104

105+
#define MXC_GPIO_SETMODE(pt, pn, m) (MXC_GPIO->out_mode[pt] = (MXC_GPIO->out_mode[pt] & ~(0xFU << (4 * pn))) | (m << (4 * pn)))
106+
#define MXC_GPIO_SETBIT(pt, pn) (MXC_SETBIT(&MXC_GPIO->out_val[pt], pn))
107+
#define MXC_GPIO_CLRBIT(pt, pn) (MXC_CLRBIT(&MXC_GPIO->out_val[pt], pn))
108+
#define MXC_GPIO_GETBIT(pt, pn) (MXC_GETBIT(&MXC_GPIO->in_val[pt], pn))
109+
105110
#endif

‎source/hic_hal/maxim/max32625/gpio.c‎

Lines changed: 33 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -108,9 +108,9 @@ void target_set_interface(TARGET_INTERFACE mode)
108108
nreset_port = PIN_nRESET_PORT;
109109
nreset_pin = PIN_nRESET_PIN;
110110

111-
MXC_CLRBIT(&MXC_GPIO->out_val[EN_VDDIOH_PORT], EN_VDDIOH_PIN); // Low to disable SWOUT
112-
MXC_SETBIT(&MXC_GPIO->out_val[IOH_OW_EN_PORT], IOH_OW_EN_PIN); // High to power MAX14689
113-
MXC_SETBIT(&MXC_GPIO->out_val[SWD_DIP_SEL_PORT], SWD_DIP_SEL_PIN); // High to connect Bn <-> Cn
111+
MXC_GPIO_CLRBIT(EN_VDDIOH_PORT, EN_VDDIOH_PIN); // Low to disable SWOUT
112+
MXC_GPIO_SETBIT(IOH_OW_EN_PORT, IOH_OW_EN_PIN); // High to power MAX14689
113+
MXC_GPIO_SETBIT(SWD_DIP_SEL_PORT, SWD_DIP_SEL_PIN); // High to connect Bn <-> Cn
114114
uart_set_instance(CDC_ACM_UART_SWD);
115115
break;
116116
case IO_DIP_EXT:
@@ -121,9 +121,9 @@ void target_set_interface(TARGET_INTERFACE mode)
121121
nreset_port = PIN_DIP_nRESET_PORT;
122122
nreset_pin = PIN_DIP_nRESET_PIN;
123123

124-
MXC_CLRBIT(&MXC_GPIO->out_val[EN_VDDIOH_PORT], EN_VDDIOH_PIN); // Low to disable SWOUT
125-
MXC_SETBIT(&MXC_GPIO->out_val[IOH_OW_EN_PORT], IOH_OW_EN_PIN); // High to power MAX14689
126-
MXC_CLRBIT(&MXC_GPIO->out_val[SWD_DIP_SEL_PORT], SWD_DIP_SEL_PIN); // Low to connect Bn <-> An
124+
MXC_GPIO_CLRBIT(EN_VDDIOH_PORT, EN_VDDIOH_PIN); // Low to disable SWOUT
125+
MXC_GPIO_SETBIT(IOH_OW_EN_PORT, IOH_OW_EN_PIN); // High to power MAX14689
126+
MXC_GPIO_CLRBIT(SWD_DIP_SEL_PORT, SWD_DIP_SEL_PIN); // Low to connect Bn <-> An
127127
uart_set_instance(CDC_ACM_UART_DIP);
128128
break;
129129
}
@@ -133,7 +133,6 @@ void target_set_interface(TARGET_INTERFACE mode)
133133
void gpio_init(void)
134134
{
135135
int i;
136-
uint32_t out_mode;
137136

138137
// Ensure that the GPIO clock is enabled
139138
if (MXC_CLKMAN->sys_clk_ctrl_6_gpio == MXC_S_CLKMAN_CLK_SCALE_DISABLED) {
@@ -147,60 +146,34 @@ void gpio_init(void)
147146

148147
// Set to enable the board to power VDDIOH and in turn the target micro
149148
// Clear to disable the board from powering VDDIOH
150-
MXC_CLRBIT(&MXC_GPIO->out_val[EN_VDDIOH_PORT], EN_VDDIOH_PIN);
151-
out_mode = MXC_GPIO->out_mode[EN_VDDIOH_PORT];
152-
out_mode &= ~(0xFU << (4 * EN_VDDIOH_PIN));
153-
out_mode |= (MXC_V_GPIO_OUT_MODE_NORMAL << (4 * EN_VDDIOH_PIN));
154-
MXC_GPIO->out_mode[EN_VDDIOH_PORT] = out_mode;
149+
MXC_GPIO_CLRBIT(EN_VDDIOH_PORT, EN_VDDIOH_PIN);
150+
MXC_GPIO_SETMODE(EN_VDDIOH_PORT, EN_VDDIOH_PIN, MXC_V_GPIO_OUT_MODE_NORMAL);
155151

156152
// LED initial state off
157-
MXC_GPIO->out_val[PIN_DAP_LED_PORT] |= (1 << PIN_DAP_LED_PIN);
158-
MXC_GPIO->out_val[PIN_MSD_LED_PORT] |= (1 << PIN_MSD_LED_PIN);
159-
MXC_GPIO->out_val[PIN_CDC_LED_PORT] |= (1 << PIN_CDC_LED_PIN);
160-
161-
// LED outputs
162-
out_mode = MXC_GPIO->out_mode[PIN_DAP_LED_PORT];
163-
out_mode &= ~(0xFU << (4 * PIN_DAP_LED_PIN));
164-
out_mode |= (MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << (4 * PIN_DAP_LED_PIN));
165-
MXC_GPIO->out_mode[PIN_DAP_LED_PORT] = out_mode;
166-
167-
out_mode = MXC_GPIO->out_mode[PIN_MSD_LED_PORT];
168-
out_mode &= ~(0xFU << (4 * PIN_MSD_LED_PIN));
169-
out_mode |= (MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << (4 * PIN_MSD_LED_PIN));
170-
MXC_GPIO->out_mode[PIN_MSD_LED_PORT] = out_mode;
171-
172-
out_mode = MXC_GPIO->out_mode[PIN_CDC_LED_PORT];
173-
out_mode &= ~(0xFU << (4 * PIN_CDC_LED_PIN));
174-
out_mode |= (MXC_V_GPIO_OUT_MODE_OPEN_DRAIN << (4 * PIN_CDC_LED_PIN));
175-
MXC_GPIO->out_mode[PIN_CDC_LED_PORT] = out_mode;
153+
MXC_GPIO_SETBIT(PIN_DAP_LED_PORT, PIN_DAP_LED_PIN);
154+
MXC_GPIO_SETBIT(PIN_MSD_LED_PORT, PIN_MSD_LED_PIN);
155+
MXC_GPIO_SETBIT(PIN_CDC_LED_PORT, PIN_CDC_LED_PIN);
156+
157+
// LED outputs
158+
MXC_GPIO_SETMODE(PIN_DAP_LED_PORT, PIN_DAP_LED_PIN, MXC_V_GPIO_OUT_MODE_OPEN_DRAIN);
159+
MXC_GPIO_SETMODE(PIN_MSD_LED_PORT, PIN_MSD_LED_PIN, MXC_V_GPIO_OUT_MODE_OPEN_DRAIN);
160+
MXC_GPIO_SETMODE(PIN_CDC_LED_PORT, PIN_CDC_LED_PIN, MXC_V_GPIO_OUT_MODE_OPEN_DRAIN);
176161

177162
// Button Input
178-
out_mode = MXC_GPIO->out_mode[PIN_RESET_IN_NO_FWRD_PORT];
179-
out_mode &= ~(0xFU << (4 * PIN_RESET_IN_NO_FWRD_PIN));
180-
out_mode |= (MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP << (4 * PIN_RESET_IN_NO_FWRD_PIN));
181-
MXC_GPIO->out_mode[PIN_RESET_IN_NO_FWRD_PORT] = out_mode;
182-
MXC_GPIO->out_val[PIN_RESET_IN_NO_FWRD_PORT] |= (0x1U << PIN_RESET_IN_NO_FWRD_PIN);
163+
MXC_GPIO_SETMODE(PIN_RESET_IN_NO_FWRD_PORT, PIN_RESET_IN_NO_FWRD_PIN, MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP);
164+
MXC_GPIO_SETBIT(PIN_RESET_IN_NO_FWRD_PORT, PIN_RESET_IN_NO_FWRD_PIN);
183165

184166
// IOH_1W_EN (must be configured for strong drive)
185-
MXC_SETBIT(&MXC_GPIO->out_val[IOH_OW_EN_PORT], IOH_OW_EN_PIN);
186-
out_mode = MXC_GPIO->out_mode[IOH_OW_EN_PORT];
187-
out_mode &= ~(0xFU << (4 * IOH_OW_EN_PIN));
188-
out_mode |= (MXC_V_GPIO_OUT_MODE_FAST_DRIVE << (4 * IOH_OW_EN_PIN));
189-
MXC_GPIO->out_mode[IOH_OW_EN_PORT] = out_mode;
167+
MXC_GPIO_SETBIT(IOH_OW_EN_PORT, IOH_OW_EN_PIN);
168+
MXC_GPIO_SETMODE(IOH_OW_EN_PORT, IOH_OW_EN_PIN, MXC_V_GPIO_OUT_MODE_FAST_DRIVE);
190169

191170
// SWD_DIP_SEL (must be configured for strong drive)
192-
MXC_CLRBIT(&MXC_GPIO->out_val[SWD_DIP_SEL_PORT], SWD_DIP_SEL_PIN);
193-
out_mode = MXC_GPIO->out_mode[SWD_DIP_SEL_PORT];
194-
out_mode &= ~(0xFU << (4 * SWD_DIP_SEL_PIN));
195-
out_mode |= (MXC_V_GPIO_OUT_MODE_FAST_DRIVE << (4 * SWD_DIP_SEL_PIN));
196-
MXC_GPIO->out_mode[SWD_DIP_SEL_PORT] = out_mode;
171+
MXC_GPIO_CLRBIT(SWD_DIP_SEL_PORT, SWD_DIP_SEL_PIN);
172+
MXC_GPIO_SETMODE(SWD_DIP_SEL_PORT, SWD_DIP_SEL_PIN, MXC_V_GPIO_OUT_MODE_FAST_DRIVE);
197173

198174
// Strong pull-up disable
199-
MXC_SETBIT(&MXC_GPIO->out_val[OWM_SUP_PORT], OWM_SUP_PIN);
200-
out_mode = MXC_GPIO->out_mode[OWM_SUP_PORT];
201-
out_mode &= ~(0xFU << (4 * OWM_SUP_PIN));
202-
out_mode |= (MXC_V_GPIO_OUT_MODE_NORMAL << (4 * OWM_SUP_PIN));
203-
MXC_GPIO->out_mode[OWM_SUP_PORT] = out_mode;
175+
MXC_GPIO_SETBIT(OWM_SUP_PORT, OWM_SUP_PIN);
176+
MXC_GPIO_SETMODE(OWM_SUP_PORT, OWM_SUP_PIN, MXC_V_GPIO_OUT_MODE_NORMAL);
204177

205178
// VDDIOH driver isn't strong enough with the strong pull-up
206179
MXC_IOMAN->use_vddioh_1 &= ~(1U << (((OWM_PORT - 4) * 8) + OWM_PIN));
@@ -229,10 +202,10 @@ void gpio_init(void)
229202
MXC_F_ADC_CTRL_ADC_CHGPUMP_PU);
230203

231204
// Change the MUX to other pins before measuring the voltage to avoid false reading
232-
MXC_SETBIT(&MXC_GPIO->out_val[SWD_DIP_SEL_PORT], SWD_DIP_SEL_PIN); // High to connect Bn <-> Cn
205+
MXC_GPIO_SETBIT(SWD_DIP_SEL_PORT, SWD_DIP_SEL_PIN); // High to connect Bn <-> Cn
233206
uint16_t tmp_hdr_vio = readADC(HDR_VIO_CH);
234207

235-
MXC_CLRBIT(&MXC_GPIO->out_val[SWD_DIP_SEL_PORT], SWD_DIP_SEL_PIN); // Low to connect Bn <-> An
208+
MXC_GPIO_CLRBIT(SWD_DIP_SEL_PORT, SWD_DIP_SEL_PIN); // Low to connect Bn <-> An
236209
uint16_t tmp_swd_vio = readADC(SWD_VIO_CH);
237210

238211
// Set IO interface
@@ -250,36 +223,36 @@ void gpio_init(void)
250223
void gpio_set_hid_led(gpio_led_state_t state)
251224
{
252225
if (state == GPIO_LED_ON) {
253-
MXC_CLRBIT(&MXC_GPIO->out_val[PIN_DAP_LED_PORT], PIN_DAP_LED_PIN);
226+
MXC_GPIO_CLRBIT(PIN_DAP_LED_PORT, PIN_DAP_LED_PIN);
254227
} else {
255-
MXC_SETBIT(&MXC_GPIO->out_val[PIN_DAP_LED_PORT], PIN_DAP_LED_PIN);
228+
MXC_GPIO_SETBIT(PIN_DAP_LED_PORT, PIN_DAP_LED_PIN);
256229
}
257230
}
258231

259232
/******************************************************************************/
260233
void gpio_set_msc_led(gpio_led_state_t state)
261234
{
262235
if (state == GPIO_LED_ON) {
263-
MXC_CLRBIT(&MXC_GPIO->out_val[PIN_MSD_LED_PORT], PIN_MSD_LED_PIN);
236+
MXC_GPIO_CLRBIT(PIN_MSD_LED_PORT, PIN_MSD_LED_PIN);
264237
} else {
265-
MXC_SETBIT(&MXC_GPIO->out_val[PIN_MSD_LED_PORT], PIN_MSD_LED_PIN);
238+
MXC_GPIO_SETBIT(PIN_MSD_LED_PORT, PIN_MSD_LED_PIN);
266239
}
267240
}
268241

269242
/******************************************************************************/
270243
void gpio_set_cdc_led(gpio_led_state_t state)
271244
{
272245
if (state == GPIO_LED_ON) {
273-
MXC_CLRBIT(&MXC_GPIO->out_val[PIN_CDC_LED_PORT], PIN_CDC_LED_PIN);
246+
MXC_GPIO_CLRBIT(PIN_CDC_LED_PORT, PIN_CDC_LED_PIN);
274247
} else {
275-
MXC_SETBIT(&MXC_GPIO->out_val[PIN_CDC_LED_PORT], PIN_CDC_LED_PIN);
248+
MXC_GPIO_SETBIT(PIN_CDC_LED_PORT, PIN_CDC_LED_PIN);
276249
}
277250
}
278251

279252
/******************************************************************************/
280253
uint8_t gpio_get_reset_btn_no_fwrd(void)
281254
{
282-
return !MXC_GETBIT(&MXC_GPIO->in_val[PIN_RESET_IN_NO_FWRD_PORT], PIN_RESET_IN_NO_FWRD_PIN);
255+
return !MXC_GPIO_GETBIT(PIN_RESET_IN_NO_FWRD_PORT, PIN_RESET_IN_NO_FWRD_PIN);
283256
}
284257

285258
/******************************************************************************/

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