Memfault Firmware SDK 1.28.0 (Build 14860)

Author: Memfault Inc

CHANGELOG.md

@@ -6,6 +6,71 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to
 [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [1.28.0] - 2025-08-04
+
+This is a minor update release. Highlights:
+
+- added a new test command for simulating hangs in ISRs
+- improved NMI exception capture
+- fixed a build issue in the nRF-Connect SDK port
+
+### 📈 Added
+
+- Zephyr:
+
+  - Add a new test command, `mflt test isr_hang`, which will cause a busy loop
+    hang inside a `k_timer`, which normally is executing from an ISR context.
+    The system will only exit this condition if there is a watchdog or other
+    higher-priority interrupt capable of preempting the `k_timer` ISR. The
+    [`qemu` sample app](examples/zephyr/qemu) is updated to enable a watchdog
+    which generates an NMI exception, caught by Memfault.
+
+  - Added a debug print when uploading data using
+    `CONFIG_MEMFAULT_HTTP_PERIODIC_UPLOAD` that shows the bytes sent:
+
+    ```bash
+    [00:09:45.821,000] <dbg> mflt: memfault_platform_log: Uploaded 118 bytes of Memfault data
+    ```
+
+    Only enabled when debug level prints are enabled for Memfault
+    (`CONFIG_MEMFAULT_LOG_LEVEL_DBG=y`).
+
+### 🛠️ Changed
+
+- Zephyr:
+
+  - NMI exceptions are now properly handled. Prior to this change, a coredump
+    was captured on NMI exceptions but the MSP context was not fully unwound and
+    the NVIC state was not included in the trace data.
+
+  - Add a new Kconfig option,
+    `CONFIG_MEMFAULT_COREDUMP_NVIC_INTERRUPTS_TO_COLLECT`, which controls the
+    existing `memfault_platform_config.h` setting
+    `MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT` for Cortex-M targets. The default now
+    is to collect all `NUM_IRQS` as defined by Zephyr, which on many platforms
+    will increase from the previous default of `32`. This improves the
+    out-of-the-box information at the cost of 44 bytes in coredump storage
+    consumed per additional 32 interrupts. Some example deltas shown below,
+    including the byte delta in the stored coredump:
+
+    | Platform  | Previous Default | New Default                                     | Byte Delta |
+    | --------- | ---------------- | ----------------------------------------------- | ---------- |
+    | nRF52840  | 32               | 64 (\*48, rounded up to nearest multiple of 32) | +44        |
+    | nRF91     | 32               | 96 (\*65 rounded up)                            | +88        |
+    | nRF53     | 32               | 96 (\*69 rounded up)                            | +88        |
+    | STM32F407 | 32               | 96 (\*82 rounded up)                            | +88        |
+    | STM32H7B0 | 32               | 160 (\*155 rounded up)                          | +176       |
+    | STM32H563 | 32               | 160 (\*155 rounded up)                          | +176       |
+
+    To restore the previous default, set
+    `CONFIG_MEMFAULT_COREDUMP_NVIC_INTERRUPTS_TO_COLLECT=32`.
+
+- nRF-Connect SDK:
+
+  - Fix a build issue impacting some nRF54 series chips related to reboot reason
+    decoding. Thanks to [@grochu](https://github.com/grochu) for providing the
+    fix in [#94](https://github.com/memfault/memfault-firmware-sdk/pull/94) 🎉!
+
 ## [1.27.0] - 2025-07-21
 
 ### 📈 Added

VERSION

@@ -1,3 +1,3 @@
-BUILD ID: 14706
-GIT COMMIT: d002984f03
-VERSION: 1.27.0
+BUILD ID: 14860
+GIT COMMIT: 4678716f67
+VERSION: 1.28.0

components/include/memfault/default_config.h

@@ -432,7 +432,7 @@ extern "C" {
 // the "ISR Analysis" tab for the Issue analyzed in the Memfault UI about the
 // appropriate setting needed.
 //
-// NB: For each additional 32 NVIC interrupts analyzed, 40 extra bytes are
+// NB: For each additional 32 NVIC interrupts analyzed, 44 extra bytes are
 // needed for coredump storage.
 #ifndef MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT
   #define MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT 32

components/include/memfault/version.h

@@ -20,8 +20,8 @@ typedef struct {
 } sMfltSdkVersion;
 
 #define MEMFAULT_SDK_VERSION \
-  { .major = 1, .minor = 27, .patch = 0 }
-#define MEMFAULT_SDK_VERSION_STR "1.27.0"
+  { .major = 1, .minor = 28, .patch = 0 }
+#define MEMFAULT_SDK_VERSION_STR "1.28.0"
 
 #ifdef __cplusplus
 }

components/panics/src/memfault_coredump_regions_armv7.c

@@ -20,10 +20,16 @@
   #include "memfault/panics/coredump_impl.h"
   #include "memfault/panics/platform/coredump.h"
 
-MEMFAULT_STATIC_ASSERT(((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT) % 32 == 0) ||
-                         ((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT) == 496),
+//! Round up to the nearest multiple of 32. Interrupt state is collected in
+//! groups of 32 due to register layout.
+  #define MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT_ROUNDED_UP \
+    ((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT + 31) / 32 * 32)
+
+MEMFAULT_STATIC_ASSERT(((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT_ROUNDED_UP) % 32 == 0) ||
+                         ((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT_ROUNDED_UP) == 496),
                        "Must be a multiple of 32 or 496");
-MEMFAULT_STATIC_ASSERT((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT) <= 512, "Exceeded max possible size");
+MEMFAULT_STATIC_ASSERT((MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT_ROUNDED_UP) <= 512,
+                       "Exceeded max possible size");
 
 MEMFAULT_STATIC_ASSERT((MEMFAULT_MPU_REGIONS_TO_COLLECT) <= 16, "Exceeded max possible size");
 
@@ -74,14 +80,14 @@ sMfltDebugExcMonCtrlReg;
 typedef MEMFAULT_PACKED_STRUCT {
   // representation for NVIC ISER, ISPR, and IABR ...
   // A single bit encodes whether or not the interrupt is enabled, pending, active, respectively.
-  uint32_t IxxR[(MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT + 31) / 32];
+  uint32_t IxxR[MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT_ROUNDED_UP / 32];
 }
 sMfltNvicIserIsprIabr;
 
 typedef MEMFAULT_PACKED_STRUCT {
   // 8 bits are used to encode the priority so 4 interrupts are covered by each register
   // NB: unimplemented priority levels read back as 0
-  uint32_t IPR[MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT / 4];
+  uint32_t IPR[MEMFAULT_NVIC_INTERRUPTS_TO_COLLECT_ROUNDED_UP / 4];
 }
 sMfltNvicIpr;
 
@@ -168,6 +174,14 @@ const sMfltCoredumpRegion *memfault_coredump_get_arch_regions(size_t *num_region
   }
   #endif /* MEMFAULT_COLLECT_MPU_STATE */
 
+  #if MEMFAULT_CACHE_FAULT_REGS
+  // Cache the faults registers if it hasn't happened already
+  sMfltCachedBlock *fault_regs = (sMfltCachedBlock *)&s_cached_fault_regs[0];
+  if (!fault_regs->valid_cache) {
+    memfault_coredump_cache_fault_regs();
+  }
+  #endif
+
   static const sMfltCoredumpRegion s_coredump_regions[] = {
     { .type = FAULT_REG_REGION_TYPE,
       .region_start = (void *)FAULT_REG_REGION_START,

examples/zephyr/qemu/qemu-app/boards/mps2_an385.conf

@@ -1 +1,8 @@
 CONFIG_MPU_STACK_GUARD=y
+CONFIG_WATCHDOG=y
+CONFIG_WDOG_CMSDK_APB_START_AT_BOOT=y
+
+# This isn't actually needed- it just adds a reboot in the driver, and we wrap
+# the NMI handler anyway, but there is a Kconfig dependency in the CMSDK APB
+# watchdog driver so we are forced to include it.
+CONFIG_RUNTIME_NMI=y

examples/zephyr/qemu/qemu-app/src/main.c

@@ -366,6 +366,26 @@ uint64_t memfault_platform_get_time_since_boot_ms(void) {
 }
 #endif
 
+#if defined(CONFIG_WDOG_CMSDK_APB_START_AT_BOOT)
+  #include MEMFAULT_ZEPHYR_INCLUDE(drivers/watchdog.h)
+// Watchdog feed timer
+static void prv_watchdog_feed_timer_handler(struct k_timer *dummy) {
+  ARG_UNUSED(dummy);
+  const struct device *const wdt = DEVICE_DT_GET(DT_ALIAS(watchdog0));
+  // the CMSDK WDOG doesn't use a channel, pass 0
+  wdt_feed(wdt, 0);
+}
+K_TIMER_DEFINE(s_watchdog_feed_timer, prv_watchdog_feed_timer_handler, NULL);
+
+static int prv_start_watchdog_feed_timer() {
+  // Start the watchdog feed timer to prevent the watchdog from resetting the system
+  k_timer_start(&s_watchdog_feed_timer, K_MSEC(100), K_MSEC(100));
+  return 0;
+}
+
+SYS_INIT(prv_start_watchdog_feed_timer, APPLICATION, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
+#endif  // CONFIG_WDOG_CMSDK_APB_START_AT_BOOT
+
 int main(void) {
   LOG_INF("👋 Memfault Demo App! Board %s\n", CONFIG_BOARD);
   memfault_device_info_dump();

ports/zephyr/Kconfig

@@ -2,7 +2,6 @@ config MEMFAULT
         bool "Memfault Support"
         default n
         depends on CPU_CORTEX_M || RISCV || SOC_SERIES_ESP32 || SOC_SERIES_ESP32S3 || ARCH_POSIX
-        select RUNTIME_NMI if CPU_CORTEX_M
         select EXTRA_EXCEPTION_INFO if CPU_CORTEX_M
         select DEBUG_THREAD_INFO
         select REBOOT if ARCH_POSIX
@@ -182,6 +181,17 @@ config MEMFAULT_COREDUMP_MPU_REGIONS_TO_COLLECT
           The maximum amount of MPU regions Memfault will store state for in a
           coredump.
 
+config MEMFAULT_COREDUMP_NVIC_INTERRUPTS_TO_COLLECT
+        int "Maximum amount of NVIC interrupts to collect in a coredump"
+        default NUM_IRQS
+        range 32 512
+        depends on CPU_CORTEX_M
+        help
+          The maximum amount of NVIC interrupts Memfault will store state for in
+          a coredump. This is useful for debugging interrupt state at the time
+          of the fault. Each additional 32 interrupts collected uses 44 bytes of
+          coredump storage.
+
 endmenu  # Memfault Coredump Settings
 
 config MEMFAULT_HEAP_STATS

ports/zephyr/common/CMakeLists.txt

@@ -9,6 +9,7 @@ zephyr_library_sources(memfault_platform_system_time.c)
 zephyr_library_sources_ifdef(CONFIG_MEMFAULT_HTTP_ENABLE memfault_platform_http.c)
 zephyr_library_sources_ifdef(CONFIG_MEMFAULT_HTTP_ENABLE memfault_platform_fota.c)
 zephyr_library_sources_ifdef(CONFIG_MEMFAULT_METRICS_THREADS memfault_platform_thread_metrics.c)
+zephyr_library_sources_ifdef(CONFIG_MEMFAULT_METRICS_WIFI memfault_platform_metrics_wifi.c)
 zephyr_library_sources_ifdef(CONFIG_MEMFAULT_RAM_BACKED_COREDUMP memfault_platform_ram_backed_coredump.c)
 zephyr_library_sources_ifdef(CONFIG_MEMFAULT_ROOT_CERT_STORAGE_TLS_CREDENTIAL_STORAGE memfault_tls_root_cert_storage.c)
 zephyr_library_sources_ifdef(CONFIG_MEMFAULT_SHELL memfault_demo_cli.c)

ports/zephyr/common/memfault_demo_cli.c

@@ -327,6 +327,24 @@ static int prv_timer_isr_crash_example(const struct shell *shell, size_t argc, c
   return 0;
 }
 
+static void prv_hang_timer_handler(struct k_timer *dummy) {
+  while (1) {
+    k_busy_wait(1000);
+  }
+}
+
+K_TIMER_DEFINE(s_isr_hang_timer, prv_hang_timer_handler, NULL);
+
+static int prv_timer_isr_hang_example(const struct shell *shell, size_t argc, char **argv) {
+#if !defined(CONFIG_WATCHDOG)
+  shell_print(shell, "Hanging in ISR. Warning, no watchdog configured, this may hang forever!");
+#else
+  shell_print(shell, "Hanging in ISR, waiting for watchdog to trigger");
+#endif
+  k_timer_start(&s_isr_hang_timer, K_MSEC(10), K_MSEC(10));
+  return 0;
+}
+
 #if defined(CONFIG_MEMFAULT_SHELL_SELF_TEST)
 static int prv_self_test(MEMFAULT_UNUSED const struct shell *shell, size_t argc, char **argv) {
   return memfault_demo_cli_cmd_self_test(argc, argv);
@@ -374,6 +392,7 @@ SHELL_STATIC_SUBCMD_SET_CREATE(
   SHELL_CMD(badptr, NULL, "trigger fault via store to a bad address", prv_bad_ptr_deref_example),
   SHELL_CMD(isr_badptr, NULL, "trigger fault via store to a bad address from an ISR",
             prv_timer_isr_crash_example),
+  SHELL_CMD(isr_hang, NULL, "trigger a hang in an ISR", prv_timer_isr_hang_example),
 
   //! user initiated reboot
   SHELL_CMD(reboot, NULL, "trigger a reboot and record it using memfault", prv_test_reboot),