Memfault Firmware SDK 0.28.1 (Build 378789)

Author: Memfault Inc

CHANGES.md

@@ -1,3 +1,17 @@
+### Changes between Memfault SDK 0.28.1 and SDK 0.28.0 - Jan 20, 2022
+
+#### :chart_with_upwards_trend: Improvements
+
+- Add an optional override flag to control the name used for Zephyr data
+  regions- see
+  [`ports/zephyr/common/memfault_zephyr_ram_regions.c`](ports/zephyr/common/memfault_zephyr_ram_regions.c).
+  Only needed for unusual Zephyr + Memfault configurations prior to Zephyr v2.7
+  (for example, nRF Connect SDK v1.7.1 with Memfault SDK v0.27.3+)
+- Fix the STM32F7xx reboot reason port to correctly account for the internally
+  wired Pin Reset
+- Fix a function prototype mismatch in the STM32L4 flash port (thanks to
+  @schultetwin for reporting this in #22!)
+
 ### Changes between Memfault SDK 0.28.0 and SDK 0.27.3 - Jan 4, 2022
 
 #### :rocket: New Features

VERSION

@@ -1,2 +1,2 @@
-BUILD ID: 370105
-GIT COMMIT: 4641213bd
+BUILD ID: 378789
+GIT COMMIT: 9d890e8cc

components/include/memfault/version.h

@@ -19,7 +19,7 @@ typedef struct {
   uint8_t patch;
 } sMfltSdkVersion;
 
-#define MEMFAULT_SDK_VERSION   { .major = 0, .minor = 28, .patch = 0 }
+#define MEMFAULT_SDK_VERSION   { .major = 0, .minor = 28, .patch = 1 }
 
 #ifdef __cplusplus
 }

ports/include/memfault/ports/stm32cube/l4/flash.h

@@ -28,7 +28,7 @@ extern "C" {
 //!
 //! @return true if no error was detected or error was successfully cleared,
 //!  false otherwise
-bool memfault_stm32cubel4_flash_clear_ecc_errors(
+bool memfault_stm32cubel4_flash_clear_ecc_error(
     uint32_t start_addr, uint32_t end_addr, uint32_t *corrupted_address);
 
 #ifdef __cplusplus

ports/stm32cube/f7/rcc_reboot_tracking.c

@@ -10,7 +10,6 @@
 //! (RCC_CSR)" section of the STM32F7 family reference manual.
 
 #include "memfault/components.h"
-#include "stm32f769xx.h"
 #include "stm32f7xx_hal.h"
 
 #if MEMFAULT_ENABLE_REBOOT_DIAG_DUMP
@@ -19,18 +18,9 @@
 #define MEMFAULT_PRINT_RESET_INFO(...)
 #endif
 
-//! Mappings come from "5.3.21 RCC clock control & status register (RCC_CSR)" of
-//! the ST "RM0410" Reference Manual for (STM32F76xxx and STM32F77xxx).
-typedef enum ResetSource {
-  kResetSource_PwrPor = (RCC_CSR_PORRSTF_Msk),
-  kResetSource_Pin = (RCC_CSR_PINRSTF_Msk),
-  kResetSource_PwrBor = (RCC_CSR_BORRSTF_Msk),
-  kResetSource_Software = (RCC_CSR_SFTRSTF_Msk),
-  kResetSource_Wwdg = (RCC_CSR_WWDGRSTF_Msk),
-  kResetSource_Iwdg = (RCC_CSR_IWDGRSTF_Msk),
-  kResetSource_LowPwr = (RCC_CSR_LPWRRSTF_Msk),
-} eResetSource;
-
+//! Reset reason codes come from "5.3.21 RCC clock control & status register
+//! (RCC_CSR)" of the ST "RM0410" Reference Manual for (STM32F76xxx and
+//! STM32F77xxx).
 void memfault_reboot_reason_get(sResetBootupInfo *info) {
   const uint32_t reset_cause = RCC->CSR;
 
@@ -39,46 +29,39 @@ void memfault_reboot_reason_get(sResetBootupInfo *info) {
   MEMFAULT_PRINT_RESET_INFO("Reset Reason, RCC_CSR=0x%" PRIx32, reset_cause);
   MEMFAULT_PRINT_RESET_INFO("Reset Causes: ");
 
-  const uint32_t reset_mask_all =
-    (RCC_CSR_BORRSTF_Msk | RCC_CSR_PINRSTF_Msk | RCC_CSR_PORRSTF_Msk | RCC_CSR_SFTRSTF_Msk |
-     RCC_CSR_IWDGRSTF_Msk | RCC_CSR_WWDGRSTF_Msk | RCC_CSR_LPWRRSTF_Msk);
-
-  switch (reset_cause & reset_mask_all) {
-    case kResetSource_PwrPor:
-      MEMFAULT_PRINT_RESET_INFO(" Power on Reset");
-      reset_reason = kMfltRebootReason_PowerOnReset;
-      break;
-    case kResetSource_Pin:
-      MEMFAULT_PRINT_RESET_INFO(" Pin Reset");
-      reset_reason = kMfltRebootReason_PinReset;
-      break;
-    case kResetSource_PwrBor:
-      MEMFAULT_PRINT_RESET_INFO(" Brown out");
-      reset_reason = kMfltRebootReason_BrownOutReset;
-      break;
-    case kResetSource_Software:
-      MEMFAULT_PRINT_RESET_INFO(" Software");
-      reset_reason = kMfltRebootReason_SoftwareReset;
-      break;
-    case kResetSource_Wwdg:
-      MEMFAULT_PRINT_RESET_INFO(" Window Watchdog");
-      reset_reason = kMfltRebootReason_HardwareWatchdog;
-      break;
-    case kResetSource_Iwdg:
-      MEMFAULT_PRINT_RESET_INFO(" Independent Watchdog");
-      reset_reason = kMfltRebootReason_HardwareWatchdog;
-      break;
-    case kResetSource_LowPwr:
-      MEMFAULT_PRINT_RESET_INFO(" Low power management");
-      reset_reason = kMfltRebootReason_LowPower;
-      break;
-    default:
-      MEMFAULT_PRINT_RESET_INFO(" Unknown");
-      break;
+  // look for the first bit set in the reset cause register.
+  //
+  // pin reset is checked last; all other internally generated resets are wired
+  // to the reset pin, see section 5.1.2 of the Reference Manual.
+  if (reset_cause & RCC_CSR_SFTRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Software");
+    reset_reason = kMfltRebootReason_SoftwareReset;
+  } else if (reset_cause & RCC_CSR_PORRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Power on Reset");
+    reset_reason = kMfltRebootReason_PowerOnReset;
+  } else if (reset_cause & RCC_CSR_BORRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Brown out");
+    reset_reason = kMfltRebootReason_BrownOutReset;
+  } else if (reset_cause & RCC_CSR_WWDGRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Window Watchdog");
+    reset_reason = kMfltRebootReason_HardwareWatchdog;
+  } else if (reset_cause & RCC_CSR_IWDGRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Independent Watchdog");
+    reset_reason = kMfltRebootReason_HardwareWatchdog;
+  } else if (reset_cause & RCC_CSR_LPWRRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Low Power");
+    reset_reason = kMfltRebootReason_LowPower;
+  } else if (reset_cause & RCC_CSR_PINRSTF_Msk) {
+    MEMFAULT_PRINT_RESET_INFO(" Pin Reset");
+    reset_reason = kMfltRebootReason_PinReset;
+  } else {
+    MEMFAULT_PRINT_RESET_INFO(" Unknown");
+    reset_reason = kMfltRebootReason_Unknown;
   }
 
 #if MEMFAULT_REBOOT_REASON_CLEAR
-  // we have read the reset information so clear the bits (since they are sticky across reboots)
+  // we have read the reset information so clear the bits (since they are sticky
+  // across reboots)
   __HAL_RCC_CLEAR_RESET_FLAGS();
 #endif
 

ports/zephyr/common/memfault_zephyr_ram_regions.c

@@ -13,11 +13,14 @@
 #include <kernel_structs.h>
 #include <version.h>
 
-#include "memfault/core/compiler.h"
-#include "memfault/core/math.h"
-#include "memfault/panics/platform/coredump.h"
+#include "memfault/components.h"
 #include "memfault/ports/zephyr/version.h"
 
+// Use this config flag to manually select the old data region names
+#if !defined(MEMFAULT_ZEPHYR_USE_OLD_DATA_REGION_NAMES)
+#define MEMFAULT_ZEPHYR_USE_OLD_DATA_REGION_NAMES 0
+#endif
+
 static struct k_thread *s_task_tcbs[CONFIG_MEMFAULT_COREDUMP_MAX_TRACKED_TASKS];
 #define EMPTY_SLOT 0
 
@@ -141,12 +144,19 @@ size_t memfault_zephyr_get_data_regions(sMfltCoredumpRegion *regions, size_t num
     return 0;
   }
 
-  // Linker variables defined in linker.ld in Zephyr RTOS
-  // Data region name changed in v2.7 of the kernel
-#if MEMFAULT_ZEPHYR_VERSION_GT(2, 6)
+  // These linker variables are defined in linker.ld in Zephyr RTOS. Note that
+  // the data region name changed in v2.7 of the kernel, so check the kernel
+  // version and set the name appropriately.
+  //
+  // Also check for a user override; this is necessary if NCS v1.7.1 is used
+  // with a Memfault SDK version >=0.27.3, because that NCS release used an
+  // intermediate Zephyr release, so the version number checking is not
+  // possible.
+#if !MEMFAULT_ZEPHYR_USE_OLD_DATA_REGION_NAMES && MEMFAULT_ZEPHYR_VERSION_GT(2, 6)
 #define ZEPHYR_DATA_REGION_START __data_region_start
 #define ZEPHYR_DATA_REGION_END __data_region_end
 #else
+  // The old names are used in previous Zephyr versions (<=2.6)
 #define ZEPHYR_DATA_REGION_START __data_ram_start
 #define ZEPHYR_DATA_REGION_END __data_ram_end
 #endif

requirements.txt

@@ -1,4 +1,4 @@
-git+git://github.com/memfault/pyserial.git@master-memfault
+git+https://github.com/memfault/pyserial.git@master-memfault
 invoke==1.2.0
 mbed-cli==1.10.1
 pyftdi==0.29.4