DMA 'Imm W R+0x10/+IWRAM (or EWRAM)' tests are not independent for channel 0 #18
Description
If you run the DMA tests and then try try to run the tests in the title individually, they will fail. This is because they rely on the latched value from the previous 'HBl W -SRAM/=ROM' test. Running them independently after the tests cycle instead uses the value from the 'Imm H V+BIOS/+VRAM' test that normally occurs after it.
This happens because the source address gets truncated down to 0x4328C as channel 0 cannot access ROM. The test also runs a DMA from BIOS, but DMA cannot access that either, so both DMAs access the latched value.
This can also indirectly demonstrate that each channel has its own latched value, as if you go back and run tests for some of the other channels, it will not change the value displayed in the 'Imm W R+0x10/+IWRAM (or EWRAM)' test for channel 0, it will only change after running some other channel 0 tests,
Confirmed on Gameboy Player.