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[AMDGPU][GISel] Add RegBankLegalize support for G_AMDGPU_WAVE_ADDRESS (llvm#167456)
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llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp

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@@ -931,6 +931,8 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
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.Any({{UniP4}, {{SgprP4}, {}}})
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.Any({{UniP8}, {{SgprP8}, {}}});
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addRulesForGOpcs({G_AMDGPU_WAVE_ADDRESS}).Any({{UniP5}, {{SgprP5}, {}}});
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bool hasSALUFloat = ST->hasSALUFloatInsts();
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addRulesForGOpcs({G_FADD}, Standard)

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir

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@@ -1,6 +1,6 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -o - %s | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -o - %s | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" -regbankselect-greedy -o - %s | FileCheck %s
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" -regbankselect-fast -o - %s | FileCheck %s
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# TODO: We could use scalar
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---
@@ -25,8 +25,7 @@ body: |
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; CHECK: [[DEF:%[0-9]+]]:sgpr(p1) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[AMDGPU_WAVE_ADDRESS:%[0-9]+]]:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p5) = COPY [[AMDGPU_WAVE_ADDRESS]](p5)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY [[DEF]](p1)
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; CHECK-NEXT: G_STORE [[COPY]](p5), [[COPY1]](p1) :: (store (p5), addrspace 1)
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; CHECK-NEXT: G_STORE [[COPY]](p5), [[DEF]](p1) :: (store (p5), addrspace 1)
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%0:_(p1) = G_IMPLICIT_DEF
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%1:_(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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G_STORE %1, %0 :: (store (p5), addrspace 1)

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