docs: modify season 1 and 2 intro section

Author: maksyuki

README.md

@@ -25,10 +25,15 @@
 
 
 ## Overview
-The TreeCore processors are the riscv cores developed under the [Open Source Chip Project by University (OSCPU)](https://github.com/OSCPU) project. OSCPU was initiated by ICT, CAS(**_Institute of computing Technology, Chinese Academy of Sciences_**), which aims to make students use all open-source toolchains to design chips by themselves. It also can be called "One Life, One Chip" project in Chinese which has carried out three season:
-1. Season 1's achievements is [NutShell](https://github.com/OSCPU/NutShell), [a Linux-Compatible RISC-V Processor Designed by Undergraduates](https://www.youtube.com/watch?v=8K97ahPecqE)(**_2021.8-2021.12_**).
-2. Season 2(**_2020.8-2021.x_**).
-3. Season 3 . Season 3 now is completed(**_2021.7-2022.1_**).
+The TreeCore processors are the riscv cores developed under the [Open Source Chip Project by University (OSCPU)](https://github.com/OSCPU) project. OSCPU was initiated by ICT, CAS(**_Institute of computing Technology, Chinese Academy of Sciences_**), which aims to make students use all open-source toolchains to design chips by themselves. Students enroll in this project need to pass tests, submit final design report and prepare oral defense for the qualification of tape-out. It also can be called "One Life, One Chip" project in Chinese which has carried out three season:
+### Season 1(**_2021.8-2021.12_**): Five undergraduates design a tape-outed riscv processor in four months
+Season 1 is a first educational practice which aims to design riscv processor for tape-out in China. And its achievements is [NutShell](https://github.com/OSCPU/NutShell), [a Linux-Compatible RISC-V Processor Designed by Undergraduates](https://www.youtube.com/watch?v=8K97ahPecqE). Five students are all from UCAS(**_University of Chinese Academy of Sciences_**).
+
+### Season 2(**_2020.8-2021.x_**): Twelve undergraduates design their own processors from five universities
+Season2 .
+
+### Season 3(**_2021.7-2022.1_**)
+Season 3 is aim to  100 processor. Season 3 now is completed.
 
 Now the TreeCore has two version: TreeCoreL1(**_TreeCore Learning 1_**) and TreeCoreL2(**_TreeCore Learning 2_**). The TreeCore project is aim to help students to develop a series of riscv processor by step-to-step materials, so not just for high performance. Not like textbooks exhibit the all the knowledges in one time, TreeCore start a very simple model and provide necessary new concepts or knowledge you need to learn.