Skip to content

Commit 337e9d5

Browse files
maksyukimaksyuki
committed
Merge branch 'tc-l2' into dev
2 parents 687f4a2 + 7d799cb commit 337e9d5

File tree

16 files changed

+308
-523
lines changed

16 files changed

+308
-523
lines changed

‎.gitignore‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@ build
77
am
88
NEMU
99
difftest
10+
ysyxSoC
1011
DRAMsim3
1112
dramsim3.json
1213
dramsim3.txt

‎rtl/Makefile‎

Lines changed: 56 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ DHRYSTONE_HOME := $(AM_KERNEL_PATH)/benchmarks/dhrystone
1919
MICROBENCH_HOME := $(AM_KERNEL_PATH)/benchmarks/microbench
2020
DIFFTEST_HOME := $(ROOT_PATH)/difftest
2121
DRAMSIM3_HOME := $(ROOT_PATH)/DRAMsim3
22+
YSYXSOC_HOME := $(ROOT_PATH)/ysyxSoC/ysyx
2223

2324
export AM_HOME := $(AM_FOLDER_PATH)/abstract-machine
2425
export NEMU_HOME := $(ROOT_PATH)/NEMU
@@ -42,6 +43,34 @@ endef
4243
millTest:
4344
mill -i __.test
4445

46+
diffPrvBuild:
47+
@cp $(ROOT_PATH)/src/main/scala/top/SimTop.scala $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
48+
@sed -i 's/class SimTop/class SoCTop/g' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
49+
@sed -i '/val logCtrl/d' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
50+
@sed -i '/val perfInfo/d' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
51+
@sed -i '/val uart/d' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
52+
@sed -i '/io.uart/d' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
53+
@sed -i 's/memAXI_0/master/g' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
54+
@sed -i 's/val master = new AXI4IO/val master = new AXI4IO/g' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
55+
@sed -i '/val master/i\ val interrupt = Input(Bool())' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
56+
@sed -i '/val master/a\ val slave = Flipped(new AXI4IO)' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
57+
@sed -i 's/axiBridge.io.inst <> treeCoreL2.io.inst/axiBridge.io.inst <> treeCoreL2.io.inst/g' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
58+
@sed -i 's/axiBridge.io.mem <> treeCoreL2.io.mem/axiBridge.io.mem <> treeCoreL2.io.mem/g' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
59+
@sed -i '/protected val treeCoreL2/a\ treeCoreL2.io.uart.in.ch := DontCare' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
60+
@sed -i '/axiBridge.io.mem/a\ io.slave.r.bits.user := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
61+
@sed -i '/axiBridge.io.mem/a\ io.slave.r.bits.id := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
62+
@sed -i '/axiBridge.io.mem/a\ io.slave.r.bits.last := false.B' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
63+
@sed -i '/axiBridge.io.mem/a\ io.slave.r.bits.data := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
64+
@sed -i '/axiBridge.io.mem/a\ io.slave.r.bits.resp := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
65+
@sed -i '/axiBridge.io.mem/a\ io.slave.r.valid := false.B' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
66+
@sed -i '/axiBridge.io.mem/a\ io.slave.ar.ready := false.B' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
67+
@sed -i '/axiBridge.io.mem/a\ io.slave.b.bits.user := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
68+
@sed -i '/axiBridge.io.mem/a\ io.slave.b.bits.id := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
69+
@sed -i '/axiBridge.io.mem/a\ io.slave.b.bits.resp := 0.U' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
70+
@sed -i '/axiBridge.io.mem/a\ io.slave.b.valid := false.B' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
71+
@sed -i '/axiBridge.io.mem/a\ io.slave.w.ready := false.B' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
72+
@sed -i '/axiBridge.io.mem/a\ io.slave.aw.ready := false.B' $(ROOT_PATH)/src/main/scala/top/SoCTop.scala
73+
4574
diffBuild:
4675
mkdir -p $(BUILD_DIR)
4776
mill -i tc_l2.runMain treecorel2.TopMain -td $(BUILD_DIR)
@@ -74,13 +103,12 @@ dramsim3Build:
74103
###### difftest target ######
75104
# if want to use the RamHelper, need to remove the 'WITH_DRAMSIM3=1'
76105
difftestBuild:
77-
sed -i 's/io_memAXI_0_w_bits_data,/io_memAXI_0_w_bits_data[3:0],/g' $(BUILD_DIR)/SimTop.v
78-
sed -i 's/io_memAXI_0_r_bits_data,/io_memAXI_0_r_bits_data[3:0],/g' $(BUILD_DIR)/SimTop.v
79-
sed -i 's/io_memAXI_0_w_bits_data =/io_memAXI_0_w_bits_data[0] =/g' $(BUILD_DIR)/SimTop.v
80-
sed -i 's/ io_memAXI_0_r_bits_data;/ io_memAXI_0_r_bits_data[0];/g' $(BUILD_DIR)/SimTop.v
106+
@sed -i 's/io_memAXI_0_\([a-z]*\)_bits_data,/io_memAXI_0_\1_bits_data[3:0],/g' $(BUILD_DIR)/SimTop.v
107+
@sed -i 's/io_memAXI_0_w_bits_data =/io_memAXI_0_w_bits_data[0] =/g' $(BUILD_DIR)/SimTop.v
108+
@sed -i 's/ io_memAXI_0_r_bits_data;/ io_memAXI_0_r_bits_data[0];/g' $(BUILD_DIR)/SimTop.v
81109
$(MAKE) -C $(DIFFTEST_HOME) WITH_DRAMSIM3=1
82110

83-
diffAllBuild: diffBuild difftestBuild
111+
diffAllBuild: diffPrvBuild diffBuild difftestBuild
84112

85113
simpleTestBuild:
86114
$(MAKE) -C $(SIMPLETEST_HOME) ARCH=riscv64-mycpu
@@ -181,6 +209,26 @@ $(cpuTestLogFile):
181209
$(cpuTestCaseName): cputest-%: $(CPUTEST_HOME)/build/%-riscv64-mycpu.bin
182210
$(call getRecursiveTestRes, $(CPUTEST_HOME))
183211

212+
###### soc name rule test target ######
213+
socTopModify:
214+
@cp $(BUILD_DIR)/SoCTop.v $(BUILD_DIR)/ysyx_210324.v
215+
@sed -i 's/module ysyx_210324_SoCTop/module ysyx_210324/g' $(BUILD_DIR)/ysyx_210324.v
216+
@sed -i 's/io_\([a-z]*\)_\([a-z]*\)_[bits]*_*\([a-z]*\)/io_\1_\2\3/g' $(BUILD_DIR)/ysyx_210324.v
217+
218+
# FIMXE: need a better solution, not just copy to dir everytime
219+
socNameCheck: socTopModify
220+
@cp $(YSYXSOC_HOME)/soc/cpu-check.py $(BUILD_DIR)
221+
@cd $(BUILD_DIR) && echo 324 | python3 cpu-check.py
222+
223+
socLintCheck: socNameCheck
224+
@cp $(BUILD_DIR)/ysyx_210324.v $(YSYXSOC_HOME)/lint/
225+
@sed -i 's/ID = \([0-9]*\)/ID = 210324/g' $(YSYXSOC_HOME)/lint/Makefile
226+
@echo -e "\033[1;32mstart lint check....\033[0m"
227+
$(MAKE) -C $(YSYXSOC_HOME)/lint/ lint
228+
@echo -e "\033[1;32mlint check done\033[0m"
229+
@echo -e "\033[1;32mstart lint-unused check....\033[0m"
230+
$(MAKE) -C $(YSYXSOC_HOME)/lint/ lint-unused
231+
@echo -e "\033[1;32mlint-unused check done\033[0m"
184232

185233
###### clean target ######
186234
cleanBuild:
@@ -194,6 +242,8 @@ cleanDepRepo:
194242

195243
cleanAll: cleanBuild cleanMillOut cleanDepRepo
196244

245+
197246
.PHONY: millTest diffBuild help compile bsp reformat checkformat \
198-
nemuBuild difftestBuild riscvTestBuild cpuTestBuild amTestBuild demoTest recursiveTest \
247+
nemuBuild difftestBuild riscvTestBuild cpuTestBuild amTestBuild demoTest \
248+
socTopModify socNameCheck \
199249
cleanBuild cleanMillOut cleanDepRepo cleanAll

‎rtl/tc_l2/setup.sh‎

Lines changed: 23 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ AM_KERNELS_FOLDER_PATH=${AM_FOLDER_PATH}"/am-kernels"
1616
DIFFTEST_FOLDER_PATH=${ROOT_PATH}"/difftest"
1717
NEMU_FOLDER_PATH=${ROOT_PATH}"/NEMU"
1818
DRAMSIM3_FOLDER_PATH=${ROOT_PATH}"/DRAMsim3"
19+
YSYXSOC_PATH=${ROOT_PATH}"/ysyxSoC"
1920

2021
# download the am repo from the github
2122
###### abstract-machine ######
@@ -185,18 +186,32 @@ configDramSim3() {
185186
cd ${ROOT_PATH}
186187
}
187188

189+
###### ysyxSoC ######
190+
configysyxSoC() {
191+
cd ${ROOT_PATH}
192+
193+
if [[ -d ${YSYXSOC_PATH} ]]; then
194+
echo -e "${RIGHT}ysyxSoC exist!${END}"
195+
else
196+
echo -e "${INFO}[no download]: git clone${END}"
197+
git clone --depth 1 https://github.com/OSCPU/ysyxSoC.git
198+
fi
199+
}
200+
188201
helpInfo() {
189-
echo -e "${INFO}Usage: setup.sh [-a][-n][-d][-m][-r][-k][-s repo][-h]${END}"
202+
echo -e "${INFO}Usage: setup.sh [-a][-n][-d][-i][-m][-r][-k][-y][-s repo][-h]${END}"
190203
echo -e "Description - set up the build env of the treecore riscv processor"
191204
echo -e ""
192205
echo -e "${RIGHT} -a: download and config all the repos${END}"
193206
echo -e "${RIGHT} -n: download and config nemu${END}"
194207
echo -e "${RIGHT} -d: download and config difftest${END}"
208+
echo -e "${RIGHT} -i: download and config dramsim3${END}"
195209
echo -e "${RIGHT} -m: download and config abstract-machine${END}"
196210
echo -e "${RIGHT} -r: download and config riscv-tests${END}"
197211
echo -e "${RIGHT} -k: download and config am-kernels${END}"
212+
echo -e "${RIGHT} -y: download and config ysyx-soc${END}"
198213
echo -e "${RIGHT} -s: download and config specific repo${END}"
199-
echo -e " sample: ./setup.sh -s [repo](default: nemu) ${INFO}[repo]: [nemu, diffttest, am, riscv-tests, am-kernels]${END}"
214+
echo -e "sample: ./setup.sh -s [repo](default: nemu) ${INFO}[repo]: [nemu, diffttest, dramsim3, am, riscv-tests, am-kernels, ysyx-soc]${END}"
200215
echo -e "${RIGHT} -h: help information${END}"
201216

202217
}
@@ -209,6 +224,7 @@ configSpecRepo() {
209224
configDiffTest
210225
configNemu
211226
configDramSim3
227+
configysyxSoC
212228
elif [[ -n $1 && $1 == "nemu" ]]; then
213229
configNemu
214230
elif [[ -n $1 && $1 == "difftest" ]]; then
@@ -221,13 +237,15 @@ configSpecRepo() {
221237
configRiscvTests
222238
elif [[ -n $1 && $1 == "am-kernels" ]]; then
223239
configAMKernels
240+
elif [[ -n $1 && $1 == "ysyx-soc" ]]; then
241+
configysyxSoC
224242
else
225-
echo -e "${ERROR}the params [$1] is not found.${END} opt value: [nemu, diffttest, am, riscv-tests, am-kernels]"
243+
echo -e "${ERROR}the params [$1] is not found.${END} opt value: [nemu, diffttest, dramsim3, am, riscv-tests, am-kernels, ysyx-soc]"
226244
fi
227245
}
228246

229247
# Check parameters
230-
while getopts 'andimrks:h' OPT; do
248+
while getopts 'andimrkys:h' OPT; do
231249
case $OPT in
232250
a) configSpecRepo "all";;
233251
n) configNemu;;
@@ -236,6 +254,7 @@ while getopts 'andimrks:h' OPT; do
236254
m) configAbstractMachine;;
237255
r) configRiscvTests;;
238256
k) configAMKernels;;
257+
y) configysyxSoC;;
239258
s) configSpecRepo $OPTARG;;
240259
h) helpInfo;;
241260
?)

0 commit comments

Comments
 (0)