Skip to content

Commit 46f1442

Browse files
committed
add special handling for the BIT macro used in the esp-idf framework
The functions the preprocessor supports (WRITE_RTC_*/READ_RTC_*) do not need the value returned by the BIT macro. Instead, they use the bit number specified to the BIT macro, i.e. for BIT(x) they need x. So this change handles BIT by simply replacing it with an empty string, and BIT(x) results in (x) in the preprocessor output.
1 parent 8d88fd1 commit 46f1442

File tree

2 files changed

+24
-0
lines changed

2 files changed

+24
-0
lines changed

esp32_ulp/preprocess.py

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,15 @@ def expand_defines(self, line):
7070
lu = self._defines.get(t, t)
7171
if lu == t and self._defines_db:
7272
lu = self._defines_db.get(t, t)
73+
if lu == t and t == 'BIT':
74+
# Special hack: BIT(..) translates to a 32-bit mask where only the specified bit is set.
75+
# But the reg_wr and reg_rd opcodes expect actual bit numbers for argument 2 and 3.
76+
# While the real READ_RTC_*/WRITE_RTC_* macros take in the output of BIT(x), they
77+
# ultimately convert these back (via helper macros) to the bit number (x). And since this
78+
# preprocessor does not (aim to) implement "proper" macro-processing, we can simply
79+
# short-circuit this round-trip via macros and replace "BIT" with nothing so that
80+
# "BIT(x)" gets mapped to "(x)".
81+
continue
7382
if lu != t:
7483
found = True
7584
line += lu

tests/preprocess.py

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -185,6 +185,21 @@ def test_expand_rtc_macros():
185185
assert p.expand_rtc_macros("READ_RTC_FIELD(1, 2)") == "\treg_rd 1, 2 + 1 - 1, 2"
186186

187187

188+
@test
189+
def preprocess_should_replace_BIT_with_empty_string_unless_defined():
190+
# by default replace BIT with empty string (see description for why in the code)
191+
src = " move r1, 0x123 << BIT(24)"
192+
assert "move r1, 0x123 << (24)" in Preprocessor().preprocess(src)
193+
194+
# but if BIT is defined, use that
195+
src = """\
196+
#define BIT 12
197+
198+
move r1, BIT"""
199+
200+
assert "move r1, 12" in Preprocessor().preprocess(src)
201+
202+
188203
@test
189204
def test_process_include_file():
190205
p = Preprocessor()

0 commit comments

Comments
 (0)