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dlechdpgeorge
dlech
authored and
dpgeorge
committed
F4_HAL/uart: Use bit-band register to set/clear bits.
This changes writes to the CR1 and CR3 registers to use bit-band access to atomically modify the registers. This is needed since the interrupt handlers also modify these same registers and an interrupt could occur in the time between when the registers is read and when the modify value is written back. This change is not made in the init functions since interrupts will not be enabled yet and it is more efficient to set more than one bit at a time.
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‎STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c

Lines changed: 71 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,16 @@
156156
/* Includes ------------------------------------------------------------------*/
157157
#include "stm32f4xx_hal.h"
158158

159+
// MicroPython: Use bit-banding to avoid race condition where an interrupt that
160+
// modifies a register can happen while a register is being modified in an IT
161+
// or DMA start or stop function.
162+
163+
#define PERIPH_BB_REG_ADDR(reg, bit_pos) (__IO uint32_t *)(PERIPH_BB_BASE + ((const uintptr_t)(&(reg)) - PERIPH_BASE) * 32 + (bit_pos) * 4)
164+
165+
// These are a near-drop-in replacement for SET_BIT and CLEAR_BIT except they can only handle one bit
166+
#define SET_BIT_PERIPH_BB(reg, bit) (*(PERIPH_BB_REG_ADDR((reg), (bit##_Pos))) = 1)
167+
#define CLEAR_BIT_PERIPH_BB(reg, bit) (*(PERIPH_BB_REG_ADDR((reg), (bit##_Pos))) = 0)
168+
159169
/** @addtogroup STM32F4xx_HAL_Driver
160170
* @{
161171
*/
@@ -809,7 +819,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData
809819
__HAL_UNLOCK(huart);
810820

811821
/* Enable the UART Transmit data register empty Interrupt */
812-
SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
822+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
813823

814824
return HAL_OK;
815825
}
@@ -851,10 +861,11 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
851861
__HAL_UNLOCK(huart);
852862

853863
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
854-
SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
864+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
855865

856866
/* Enable the UART Parity Error and Data Register not empty Interrupts */
857-
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
867+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
868+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RXNEIE);
858869

859870
return HAL_OK;
860871
}
@@ -918,7 +929,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat
918929

919930
/* Enable the DMA transfer for transmit request by setting the DMAT bit
920931
in the UART CR3 register */
921-
SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
932+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
922933

923934
return HAL_OK;
924935
}
@@ -985,14 +996,14 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData
985996
__HAL_UNLOCK(huart);
986997

987998
/* Enable the UART Parity Error Interrupt */
988-
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
999+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
9891000

9901001
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
991-
SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1002+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
9921003

9931004
/* Enable the DMA transfer for the receiver request by setting the DMAR bit
9941005
in the UART CR3 register */
995-
SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1006+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
9961007

9971008
return HAL_OK;
9981009
}
@@ -1018,17 +1029,17 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
10181029
if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
10191030
{
10201031
/* Disable the UART DMA Tx request */
1021-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1032+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
10221033
}
10231034
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
10241035
if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
10251036
{
10261037
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1027-
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1028-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1038+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
1039+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
10291040

10301041
/* Disable the UART DMA Rx request */
1031-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1042+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
10321043
}
10331044

10341045
/* Process Unlocked */
@@ -1051,7 +1062,7 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
10511062
if(huart->gState == HAL_UART_STATE_BUSY_TX)
10521063
{
10531064
/* Enable the UART DMA Tx request */
1054-
SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1065+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
10551066
}
10561067
if(huart->RxState == HAL_UART_STATE_BUSY_RX)
10571068
{
@@ -1063,11 +1074,11 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
10631074
}
10641075

10651076
/* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
1066-
SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1067-
SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1077+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
1078+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
10681079

10691080
/* Enable the UART DMA Rx request */
1070-
SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1081+
SET_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
10711082
}
10721083

10731084
/* Process Unlocked */
@@ -1095,7 +1106,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
10951106
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
10961107
if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
10971108
{
1098-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1109+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
10991110

11001111
/* Abort the UART DMA Tx channel */
11011112
if(huart->hdmatx != NULL)
@@ -1109,7 +1120,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
11091120
dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
11101121
if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
11111122
{
1112-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1123+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
11131124

11141125
/* Abort the UART DMA Rx channel */
11151126
if(huart->hdmarx != NULL)
@@ -1137,13 +1148,16 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
11371148
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
11381149
{
11391150
/* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1140-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1141-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1151+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RXNEIE);
1152+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
1153+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
1154+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
1155+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
11421156

11431157
/* Disable the UART DMA Tx request if enabled */
11441158
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
11451159
{
1146-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1160+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
11471161

11481162
/* Abort the UART DMA Tx channel: use blocking DMA Abort API (no callback) */
11491163
if(huart->hdmatx != NULL)
@@ -1159,7 +1173,7 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
11591173
/* Disable the UART DMA Rx request if enabled */
11601174
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
11611175
{
1162-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1176+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
11631177

11641178
/* Abort the UART DMA Rx channel: use blocking DMA Abort API (no callback) */
11651179
if(huart->hdmarx != NULL)
@@ -1201,12 +1215,13 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
12011215
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
12021216
{
12031217
/* Disable TXEIE and TCIE interrupts */
1204-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
1218+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
1219+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
12051220

12061221
/* Disable the UART DMA Tx request if enabled */
12071222
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
12081223
{
1209-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1224+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
12101225

12111226
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
12121227
if(huart->hdmatx != NULL)
@@ -1243,13 +1258,14 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
12431258
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
12441259
{
12451260
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1246-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
1247-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1261+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RXNEIE);
1262+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
1263+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
12481264

12491265
/* Disable the UART DMA Rx request if enabled */
12501266
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
12511267
{
1252-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1268+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
12531269

12541270
/* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
12551271
if(huart->hdmarx != NULL)
@@ -1290,8 +1306,11 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
12901306
uint32_t AbortCplt = 0x01U;
12911307

12921308
/* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1293-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1294-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1309+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
1310+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
1311+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
1312+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
1313+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
12951314

12961315
/* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
12971316
before any call to DMA Abort functions */
@@ -1328,7 +1347,7 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
13281347
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
13291348
{
13301349
/* Disable DMA Tx at UART level */
1331-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1350+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
13321351

13331352
/* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
13341353
if(huart->hdmatx != NULL)
@@ -1410,12 +1429,13 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
14101429
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
14111430
{
14121431
/* Disable TXEIE and TCIE interrupts */
1413-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
1432+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
1433+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
14141434

14151435
/* Disable the UART DMA Tx request if enabled */
14161436
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
14171437
{
1418-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1438+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
14191439

14201440
/* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
14211441
if(huart->hdmatx != NULL)
@@ -1599,7 +1619,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
15991619
/* Disable the UART DMA Rx request if enabled */
16001620
if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
16011621
{
1602-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1622+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
16031623

16041624
/* Abort the UART DMA Rx channel */
16051625
if(huart->hdmarx != NULL)
@@ -1808,7 +1828,7 @@ HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
18081828
huart->gState = HAL_UART_STATE_BUSY;
18091829

18101830
/* Send break characters */
1811-
SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
1831+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_SBK);
18121832

18131833
huart->gState = HAL_UART_STATE_READY;
18141834

@@ -1835,7 +1855,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
18351855
huart->gState = HAL_UART_STATE_BUSY;
18361856

18371857
/* Enable the USART mute mode by setting the RWU bit in the CR1 register */
1838-
SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
1858+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RWU);
18391859

18401860
huart->gState = HAL_UART_STATE_READY;
18411861

@@ -1862,7 +1882,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
18621882
huart->gState = HAL_UART_STATE_BUSY;
18631883

18641884
/* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
1865-
CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
1885+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RWU);
18661886

18671887
huart->gState = HAL_UART_STATE_READY;
18681888

@@ -2009,10 +2029,10 @@ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
20092029

20102030
/* Disable the DMA transfer for transmit request by setting the DMAT bit
20112031
in the UART CR3 register */
2012-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2032+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAT);
20132033

20142034
/* Enable the UART Transmit Complete Interrupt */
2015-
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
2035+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
20162036

20172037
}
20182038
/* DMA Circular mode */
@@ -2049,12 +2069,12 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
20492069
huart->RxXferCount = 0U;
20502070

20512071
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2052-
CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
2053-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2072+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
2073+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
20542074

20552075
/* Disable the DMA transfer for the receiver request by setting the DMAR bit
20562076
in the UART CR3 register */
2057-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2077+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_DMAR);
20582078

20592079
/* At end of Rx process, restore huart->RxState to Ready */
20602080
huart->RxState = HAL_UART_STATE_READY;
@@ -2151,7 +2171,8 @@ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart,
21512171
static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
21522172
{
21532173
/* Disable TXEIE and TCIE interrupts */
2154-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
2174+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
2175+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
21552176

21562177
/* At end of Tx process, restore huart->gState to Ready */
21572178
huart->gState = HAL_UART_STATE_READY;
@@ -2165,8 +2186,9 @@ static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
21652186
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
21662187
{
21672188
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2168-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2169-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2189+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RXNEIE);
2190+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
2191+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
21702192

21712193
/* At end of Rx process, restore huart->RxState to Ready */
21722194
huart->RxState = HAL_UART_STATE_READY;
@@ -2339,10 +2361,10 @@ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
23392361
if(--huart->TxXferCount == 0U)
23402362
{
23412363
/* Disable the UART Transmit Complete Interrupt */
2342-
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
2364+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TXEIE);
23432365

23442366
/* Enable the UART Transmit Complete Interrupt */
2345-
SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
2367+
SET_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
23462368
}
23472369
return HAL_OK;
23482370
}
@@ -2361,7 +2383,7 @@ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
23612383
static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
23622384
{
23632385
/* Disable the UART Transmit Complete Interrupt */
2364-
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
2386+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_TCIE);
23652387

23662388
/* Tx process is ended, restore huart->gState to Ready */
23672389
huart->gState = HAL_UART_STATE_READY;
@@ -2413,10 +2435,11 @@ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
24132435
if(--huart->RxXferCount == 0U)
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{
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/* Disable the UART Parity Error Interrupt and RXNE interrupt*/
2416-
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2438+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_RXNEIE);
2439+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR1, USART_CR1_PEIE);
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/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
2419-
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2442+
CLEAR_BIT_PERIPH_BB(huart->Instance->CR3, USART_CR3_EIE);
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/* Rx process is completed, restore huart->RxState to Ready */
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huart->RxState = HAL_UART_STATE_READY;

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