[SPIR-V] `pow` hitting assert on half and float types for Vulkan target

[kmpeng]

https://godbolt.org/z/58rf9n114

Discovered while running the offload-test-suite. This constant-folding case:

// RUN: %dxc -spirv -fspv-target-env=vulkan1.3 -enable-16bit-types -Gis -HV 202x -T cs_6_5 %s

StructuredBuffer<half4> X : register(t0);
StructuredBuffer<half4> Y : register(t1);

RWStructuredBuffer<half4> Out : register(u2);

[numthreads(1,1,1)]
void main() {
  Out[3] = pow(half4(2, 4, 1.5, 8), half4(3, 0.5, 2, 0.33333333));
}

is producing this error:

# .---command stderr------------
# | Internal compiler error: LLVM Assert
# `-----------------------------
# error: command failed with exit status: 0xe0000001

Error: assert((!HasStatus(inst) || Status(inst) != SSAPropagator::kNotInteresting) && "Unsettled value")
File:
/home/kaitlinpeng/DirectXShaderCompiler/external/SPIRV-Tools/source/opt/propagator.cpp(265)
Func:   operator()
Illegal instruction (core dumped)

The same error occurs when using float, though seems like that one only hits the assert when the -Gis flag is enabled.

[s-perron]

FYI: @luciechoi

[s-perron]

This look like a duplicate of another issue I assigned to you.

[bogner]

FWIW this assert doesn't appear to trigger prior to #7693, so this is likely an issue with nan, inf, or signed zeros.