x86/hyperv: Dispatch redirected proxy interrupts

Once a redirected proxy interrupt has been configured, the IOMMU at the
host will post it directly to a hardware vector in the VTL2 guest.
Calculate the index of the proxy interrupt based on the hardware interrupt
vector and indicate that it needs to be asserted.

We only read the redirected data structures during interrupts. Protect
access using the provided seqcount. This allows lockless access for
readers.

Signed-off-by: Ricardo Neri <[email protected]>
---
Changes since v1:
 * Used a seqcount for serialization

Author: ricardon

arch/x86/kernel/cpu/mshyperv.c

@@ -181,6 +181,32 @@ static seqcount_raw_spinlock_t redirected_proxy_intr_seq =
 
 DEFINE_IDTENTRY_IRQ(hv_vtl_redirected_interrupt)
 {
+	unsigned int seq;
+	u32 proxy_intr;
+
+	if (!hv_redirected_proxy_intr_handler) {
+		pr_err_ratelimited("redirected intr handler not defined. hw intr %u not handled\n", vector);
+		goto out;
+	}
+
+	if (vector < FIRST_HV_VTL_REDIRECTED_VECTOR || vector > FIRST_SYSTEM_VECTOR) {
+		pr_err_ratelimited("redirected hw vector %u is invalid\n", vector);
+		goto out;
+	}
+
+	do {
+		seq = read_seqcount_begin(&redirected_proxy_intr_seq);
+		proxy_intr = redirected_proxy_intr[vector - FIRST_HV_VTL_REDIRECTED_VECTOR];
+	} while (read_seqcount_retry(&redirected_proxy_intr_seq, seq));
+
+	if (proxy_intr == REDIRECTED_VECTOR_UNDEF) {
+		pr_err_ratelimited("hw vector %u not redictected to proxy interrupt\n", vector);
+		goto out;
+	}
+
+	hv_redirected_proxy_intr_handler(proxy_intr);
+
+out:
 	apic_eoi();
 }
 #endif