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Merge pull request #104 kernel upgrade to 6.12.47
HCL kernel upgrade to 6.12.47
2 parents 0e378a8 + 2ef1e6f commit f655e8e

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Documentation/ABI/testing/sysfs-devices-system-cpu

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@@ -525,6 +525,7 @@ What: /sys/devices/system/cpu/vulnerabilities
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/sys/devices/system/cpu/vulnerabilities/srbds
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/sys/devices/system/cpu/vulnerabilities/tsa
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/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
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/sys/devices/system/cpu/vulnerabilities/vmscape
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Date: January 2018
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Contact: Linux kernel mailing list <[email protected]>
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Description: Information about CPU vulnerabilities

Documentation/admin-guide/hw-vuln/index.rst

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@@ -23,3 +23,4 @@ are configurable at compile, boot or run time.
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gather_data_sampling
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reg-file-data-sampling
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indirect-target-selection
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vmscape
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.. SPDX-License-Identifier: GPL-2.0
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VMSCAPE
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=======
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VMSCAPE is a vulnerability that may allow a guest to influence the branch
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prediction in host userspace. It particularly affects hypervisors like QEMU.
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Even if a hypervisor may not have any sensitive data like disk encryption keys,
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guest-userspace may be able to attack the guest-kernel using the hypervisor as
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a confused deputy.
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Affected processors
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-------------------
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The following CPU families are affected by VMSCAPE:
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**Intel processors:**
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- Skylake generation (Parts without Enhanced-IBRS)
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- Cascade Lake generation - (Parts affected by ITS guest/host separation)
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- Alder Lake and newer (Parts affected by BHI)
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Note that, BHI affected parts that use BHB clearing software mitigation e.g.
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Icelake are not vulnerable to VMSCAPE.
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**AMD processors:**
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- Zen series (families 0x17, 0x19, 0x1a)
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** Hygon processors:**
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- Family 0x18
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Mitigation
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----------
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Conditional IBPB
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----------------
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Kernel tracks when a CPU has run a potentially malicious guest and issues an
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IBPB before the first exit to userspace after VM-exit. If userspace did not run
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between VM-exit and the next VM-entry, no IBPB is issued.
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Note that the existing userspace mitigation against Spectre-v2 is effective in
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protecting the userspace. They are insufficient to protect the userspace VMMs
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from a malicious guest. This is because Spectre-v2 mitigations are applied at
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context switch time, while the userspace VMM can run after a VM-exit without a
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context switch.
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Vulnerability enumeration and mitigation is not applied inside a guest. This is
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because nested hypervisors should already be deploying IBPB to isolate
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themselves from nested guests.
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SMT considerations
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------------------
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When Simultaneous Multi-Threading (SMT) is enabled, hypervisors can be
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vulnerable to cross-thread attacks. For complete protection against VMSCAPE
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attacks in SMT environments, STIBP should be enabled.
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The kernel will issue a warning if SMT is enabled without adequate STIBP
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protection. Warning is not issued when:
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- SMT is disabled
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- STIBP is enabled system-wide
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- Intel eIBRS is enabled (which implies STIBP protection)
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System information and options
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------------------------------
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The sysfs file showing VMSCAPE mitigation status is:
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/sys/devices/system/cpu/vulnerabilities/vmscape
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The possible values in this file are:
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* 'Not affected':
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The processor is not vulnerable to VMSCAPE attacks.
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* 'Vulnerable':
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The processor is vulnerable and no mitigation has been applied.
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* 'Mitigation: IBPB before exit to userspace':
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Conditional IBPB mitigation is enabled. The kernel tracks when a CPU has
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run a potentially malicious guest and issues an IBPB before the first
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exit to userspace after VM-exit.
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* 'Mitigation: IBPB on VMEXIT':
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IBPB is issued on every VM-exit. This occurs when other mitigations like
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RETBLEED or SRSO are already issuing IBPB on VM-exit.
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Mitigation control on the kernel command line
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----------------------------------------------
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The mitigation can be controlled via the ``vmscape=`` command line parameter:
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* ``vmscape=off``:
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Disable the VMSCAPE mitigation.
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* ``vmscape=ibpb``:
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Enable conditional IBPB mitigation (default when CONFIG_MITIGATION_VMSCAPE=y).
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* ``vmscape=force``:
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Force vulnerability detection and mitigation even on processors that are
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not known to be affected.

Documentation/admin-guide/kernel-parameters.txt

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srbds=off [X86,INTEL]
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ssbd=force-off [ARM64]
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tsx_async_abort=off [X86]
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vmscape=off [X86]
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Exceptions:
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This does not have any effect on
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vmpoff= [KNL,S390] Perform z/VM CP command after power off.
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Format: <command>
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vmscape= [X86] Controls mitigation for VMscape attacks.
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VMscape attacks can leak information from a userspace
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hypervisor to a guest via speculative side-channels.
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off - disable the mitigation
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ibpb - use Indirect Branch Prediction Barrier
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(IBPB) mitigation (default)
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force - force vulnerability detection even on
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unaffected processors
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vsyscall= [X86-64,EARLY]
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Controls the behavior of vsyscalls (i.e. calls to
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fixed addresses of 0xffffffffff600x00 from legacy

Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml

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- const: bus
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- const: core
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- const: vsync
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- const: lut
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- const: tbu
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- const: tbu_rt
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# MSM8996 has additional iommu clock

Makefile

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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 12
4-
SUBLEVEL = 44
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SUBLEVEL = 47
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EXTRAVERSION =
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NAME = Baby Opossum Posse
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arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts

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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&reg_usdhc2_vmmc>;
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vqmmc-supply = <&ldo5>;
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bus-width = <4>;
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status = "okay";
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};

arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi

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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&reg_usdhc2_vmmc>;
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vqmmc-supply = <&ldo5>;
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bus-width = <4>;
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status = "okay";
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};

arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts

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status = "okay";
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};
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&reg_usdhc2_vqmmc {
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status = "okay";
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};
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&sai5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai5>;
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<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
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<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
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<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>,
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<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
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<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
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};
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pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
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<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
899-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
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<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
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};
902903

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pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts

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status = "okay";
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};
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&reg_usdhc2_vqmmc {
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status = "okay";
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d2>,
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<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d2>,
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<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d2>,
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>,
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<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d2>;
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};
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pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
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<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
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<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
995-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
996-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
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<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
997999
};
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9991001
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
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10021004
<MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
10031005
<MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
10041006
<MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
1005-
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>,
1006-
<MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0>;
1007+
<MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
10071008
};
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10091010
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {

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