TEST8rr instruction failing to lift properly #184
Description
Hi,
Recently started working with llvm-mctoll and trying to lift and recompile a small x64 httpd server program as a proof of concept to see if it would be a fit for another tool I am working on. I've successfully added in some missing instructions, but have hit a new issue and was hoping someone could point me in the correct direction.
In raiseBinaryOpRegToRegMachineInstr, I'm getting an assertion error for the following instruction: TEST8rr $al, $al, <0x5590bc01d7d8>, implicit-def $eflags
With the assertion being:
bool llvm::mctoll::X86MachineInstructionRaiser::raiseBinaryOpRegToRegMachineInstr(const llvm::MachineInstr&): Assertion `(Src1Value != nullptr) && (Src2Value != nullptr) && "Unhandled situation: register is used before initialization in " "test"' failed.
I have verified that both SrcValues are null, but am failing to see where the build up to the SSA value for X86MachineInstructionRaiser::getRegOperandValue is happening.
I dumped the MachineFunction if it helps:
function: # Machine code for function printf: TracksLiveness
Frame Objects:
fi#0: size=8, align=1, at location [SP-208]
fi#1: size=8, align=1, at location [SP+48]
fi#2: size=8, align=1, at location [SP+56]
fi#3: size=8, align=1, at location [SP+64]
fi#4: size=8, align=1, at location [SP+72]
fi#5: size=8, align=1, at location [SP+80]
bb.0:
successors: %bb.2, %bb.1
$rsp = SUB64ri32 $rsp(tied-def 0), 216, <0x5590bc01cff8>, implicit-def $eflags
$r10 = MOV64rr $rdi, <0x5590bc01d118>
MOV64mr $rsp, 1, $noreg, 40, $noreg, $rsi, <0x5590bc01d238>
MOV64mr $rsp, 1, $noreg, 48, $noreg, $rdx, <0x5590bc01d358>
MOV64mr $rsp, 1, $noreg, 56, $noreg, $rcx, <0x5590bc01d478>
MOV64mr $rsp, 1, $noreg, 64, $noreg, $r8, <0x5590bc01d598>
MOV64mr $rsp, 1, $noreg, 72, $noreg, $r9, <0x5590bc01d6b8>
TEST8rr $al, $al, <0x5590bc01d7d8>, implicit-def $eflags
JCC_1 55, 4, <0x5590bc01e908>, implicit $eflags
bb.1:
; predecessors: %bb.0
successors: %bb.2
MOVAPSmr $rsp, 1, $noreg, 80, $noreg, $xmm0, <0x5590bc01ead8>
MOVAPSmr $rsp, 1, $noreg, 96, $noreg, $xmm1, <0x5590bc01ebf8>
MOVAPSmr $rsp, 1, $noreg, 112, $noreg, $xmm2, <0x5590bc01ed18>
MOVAPSmr $rsp, 1, $noreg, 128, $noreg, $xmm3, <0x5590bc01ee38>
MOVAPSmr $rsp, 1, $noreg, 144, $noreg, $xmm4, <0x5590bc01ef58>
MOVAPSmr $rsp, 1, $noreg, 160, $noreg, $xmm5, <0x5590bc01f078>
MOVAPSmr $rsp, 1, $noreg, 176, $noreg, $xmm6, <0x5590bc01f198>
MOVAPSmr $rsp, 1, $noreg, 192, $noreg, $xmm7, <0x5590bc01f2b8>
bb.2:
; predecessors: %bb.0, %bb.1
$rax = LEA64r $rsp, 1, $noreg, 224, $noreg, <0x5590bc01f4b8>
$rdx = LEA64r $rsp, 1, $noreg, 8, $noreg, <0x5590bc01f5b8>
$rsi = MOV64rr $r10, <0x5590bc01f6d8>
MOV32mi $rsp, 1, $noreg, 8, $noreg, 8, <0x5590bc020808>
MOV64mr $rsp, 1, $noreg, 16, $noreg, $rax, <0x5590bc020928>
$rax = LEA64r $rsp, 1, $noreg, 32, $noreg, <0x5590bc020a48>
MOV64mr $rsp, 1, $noreg, 24, $noreg, $rax, <0x5590bc020b68>
$rax = MOV64ri32 4247616, <0x5590bc020c88>
MOV32mi $rsp, 1, $noreg, 12, $noreg, 48, <0x5590bc020da8>
$rdi = MOV64rm $rax, 1, $noreg, 0, $noreg, <0x5590bc020ec8>
CALL64pcrel32 324, <0x5590bc020fe8>, implicit $rsp, implicit $ssp
$rsp = ADD64ri32 $rsp(tied-def 0), 216, <0x5590bc021108>, implicit-def $eflags
RET64 <0x5590bc021228>
# End machine code for function printf.
This is my first time delving into the MachineInstruction layer, so it has been a fun learning experience!
Thanks,
Dave