@@ -708,21 +708,21 @@ static inline mi_threadid_t _mi_thread_id(void) mi_attr_noexcept {
708708}
709709
710710#elif defined(__GNUC__ ) && \
711- (defined(__x86_64__ ) || defined(__i386__ ) || defined(__arm__ ) || defined( __aarch64__ ))
711+ (defined(__x86_64__ ) || defined(__i386__ ) || defined(__aarch64__ ))
712712
713- // TLS register on x86 is in the FS or GS register, see: https://akkadia.org/drepper/tls.pdf
713+ // see also https://akkadia.org/drepper/tls.pdf for more info on the TLS register.
714714static inline void * mi_tls_slot (size_t slot ) mi_attr_noexcept {
715715 void * res ;
716716 const size_t ofs = (slot * sizeof (void * ));
717717#if defined(__i386__ )
718- __asm__("movl %%gs:%1, %0" : "=r" (res ) : "m" (* ((void * * )ofs )) : ); // 32-bit always uses GS
718+ __asm__("movl %%gs:%1, %0" : "=r" (res ) : "m" (* ((void * * )ofs )) : ); // x86 32-bit always uses GS
719719#elif defined(__APPLE__ ) && defined(__x86_64__ )
720720 __asm__("movq %%gs:%1, %0" : "=r" (res ) : "m" (* ((void * * )ofs )) : ); // x86_64 macOSX uses GS
721721#elif defined(__x86_64__ ) && (MI_INTPTR_SIZE == 4 )
722722 __asm__("movl %%fs:%1, %0" : "=r" (res ) : "m" (* ((void * * )ofs )) : ); // x32 ABI
723723#elif defined(__x86_64__ )
724724 __asm__("movq %%fs:%1, %0" : "=r" (res ) : "m" (* ((void * * )ofs )) : ); // x86_64 Linux, BSD uses FS
725- #elif defined(__arm__ )
725+ #elif defined(__arm__ ) // arm32: defined but currently not used (see issue #495)
726726 void * * tcb ; MI_UNUSED (ofs );
727727 __asm__ volatile ("mrc p15, 0, %0, c13, c0, 3\nbic %0, %0, #3" : "=r" (tcb ));
728728 res = tcb [slot ];
@@ -739,7 +739,7 @@ static inline void* mi_tls_slot(size_t slot) mi_attr_noexcept {
739739 return res ;
740740}
741741
742- // setting is only used on macOSX for now
742+ // setting a tls slot is only used on macOSX for now
743743static inline void mi_tls_slot_set (size_t slot , void * value ) mi_attr_noexcept {
744744 const size_t ofs = (slot * sizeof (void * ));
745745#if defined(__i386__ )
@@ -767,16 +767,16 @@ static inline void mi_tls_slot_set(size_t slot, void* value) mi_attr_noexcept {
767767}
768768
769769static inline mi_threadid_t _mi_thread_id (void ) mi_attr_noexcept {
770- #if defined(__arm__ ) || (defined(__ANDROID__ ) && defined(__aarch64__ ))
771- // issue #384, #495: on arm32 and arm32/arm64 Android, slot 1 is the thread ID (pointer to pthread internal struct)
770+ #if defined(__ANDROID__ ) && (defined(__arm__ ) || defined(__aarch64__ ))
771+ // issue #384, #495: on arm Android, slot 1 is the thread ID (pointer to pthread internal struct)
772772 return (uintptr_t )mi_tls_slot (1 );
773773#else
774774 // in all our other targets, slot 0 is the pointer to the thread control block
775775 return (uintptr_t )mi_tls_slot (0 );
776776#endif
777777}
778778#else
779- // otherwise use standard C
779+ // otherwise use portable C
780780static inline mi_threadid_t _mi_thread_id (void ) mi_attr_noexcept {
781781 return (uintptr_t )& _mi_heap_default ;
782782}
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