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| 1 | +/* |
| 2 | + * Copyright (c) 2021-2022, Christopher Durand |
| 3 | + * Copyright (c) 2021, Niklas Hauser |
| 4 | + * |
| 5 | + * This file is part of the modm project. |
| 6 | + * |
| 7 | + * This Source Code Form is subject to the terms of the Mozilla Public |
| 8 | + * License, v. 2.0. If a copy of the MPL was not distributed with this |
| 9 | + * file, You can obtain one at http://mozilla.org/MPL/2.0/. |
| 10 | + */ |
| 11 | +// ---------------------------------------------------------------------------- |
| 12 | + |
| 13 | +#pragma once |
| 14 | + |
| 15 | +#include <modm/platform.hpp> |
| 16 | +#include <modm/architecture/interface/clock.hpp> |
| 17 | +#include <modm/debug/logger.hpp> |
| 18 | + |
| 19 | +using namespace modm::platform; |
| 20 | + |
| 21 | +/// @ingroup modm_board_nucleo_h755zi-q |
| 22 | +#define MODM_BOARD_HAS_LOGGER |
| 23 | + |
| 24 | +namespace Board |
| 25 | +{ |
| 26 | +/// @ingroup modm_board_nucleo_h755zi-q |
| 27 | +/// @{ |
| 28 | +using namespace modm::literals; |
| 29 | + |
| 30 | +/// STM32H755 running at 480MHz from the external 8MHz HSE |
| 31 | +struct SystemClock |
| 32 | +{ |
| 33 | + static constexpr uint32_t SysClk = 480_MHz; |
| 34 | + |
| 35 | + // Max 480MHz |
| 36 | + static constexpr uint32_t Hclk = SysClk / 1; // D1CPRE |
| 37 | + // Max 240MHz |
| 38 | + static constexpr uint32_t Ahb = Hclk / 2; // HPRE |
| 39 | + |
| 40 | +#ifdef CORE_CM7 |
| 41 | + static constexpr uint32_t Frequency = Hclk; |
| 42 | +#else |
| 43 | + static constexpr uint32_t Frequency = Ahb; |
| 44 | +#endif |
| 45 | + |
| 46 | + // Max 240MHz |
| 47 | + static constexpr uint32_t Ahb1 = Ahb; |
| 48 | + static constexpr uint32_t Ahb2 = Ahb; |
| 49 | + static constexpr uint32_t Ahb3 = Ahb; |
| 50 | + static constexpr uint32_t Ahb4 = Ahb; |
| 51 | + // Max 120MHz |
| 52 | + static constexpr uint32_t Apb1 = Ahb / 2; // D2PPRE1 |
| 53 | + static constexpr uint32_t Apb2 = Ahb / 2; // D2PPRE2 |
| 54 | + static constexpr uint32_t Apb3 = Ahb / 2; // D1PPRE |
| 55 | + static constexpr uint32_t Apb4 = Ahb / 2; // D3PPRE |
| 56 | + |
| 57 | + static constexpr uint32_t Adc1 = Ahb1; |
| 58 | + static constexpr uint32_t Adc2 = Ahb1; |
| 59 | + static constexpr uint32_t Adc3 = Ahb4; |
| 60 | + |
| 61 | + static constexpr uint32_t Dac1 = Apb1; |
| 62 | + static constexpr uint32_t Dac2 = Apb1; |
| 63 | + |
| 64 | + static constexpr uint32_t Spi1 = Apb2; |
| 65 | + static constexpr uint32_t Spi2 = Apb1; |
| 66 | + static constexpr uint32_t Spi3 = Apb1; |
| 67 | + static constexpr uint32_t Spi4 = Apb2; |
| 68 | + static constexpr uint32_t Spi5 = Apb2; |
| 69 | + static constexpr uint32_t Spi6 = Apb4; |
| 70 | + |
| 71 | + static constexpr uint32_t Usart1 = Apb2; |
| 72 | + static constexpr uint32_t Usart2 = Apb1; |
| 73 | + static constexpr uint32_t Usart3 = Apb1; |
| 74 | + static constexpr uint32_t Uart4 = Apb1; |
| 75 | + static constexpr uint32_t Uart5 = Apb1; |
| 76 | + static constexpr uint32_t Usart6 = Apb2; |
| 77 | + static constexpr uint32_t Uart7 = Apb1; |
| 78 | + static constexpr uint32_t Uart8 = Apb1; |
| 79 | + |
| 80 | + static constexpr uint32_t LpUart1 = Apb4; |
| 81 | + |
| 82 | + static constexpr uint32_t Can1 = Apb1; |
| 83 | + static constexpr uint32_t Can2 = Apb1; |
| 84 | + |
| 85 | + static constexpr uint32_t I2c1 = Apb1; |
| 86 | + static constexpr uint32_t I2c2 = Apb1; |
| 87 | + static constexpr uint32_t I2c3 = Apb1; |
| 88 | + static constexpr uint32_t I2c4 = Apb4; |
| 89 | + |
| 90 | + static constexpr uint32_t Apb1Timer = Apb1 * 2; |
| 91 | + static constexpr uint32_t Apb2Timer = Apb2 * 2; |
| 92 | + static constexpr uint32_t Timer1 = Apb2Timer; |
| 93 | + static constexpr uint32_t Timer2 = Apb1Timer; |
| 94 | + static constexpr uint32_t Timer3 = Apb1Timer; |
| 95 | + static constexpr uint32_t Timer4 = Apb1Timer; |
| 96 | + static constexpr uint32_t Timer5 = Apb1Timer; |
| 97 | + static constexpr uint32_t Timer6 = Apb1Timer; |
| 98 | + static constexpr uint32_t Timer7 = Apb1Timer; |
| 99 | + static constexpr uint32_t Timer8 = Apb2Timer; |
| 100 | + static constexpr uint32_t Timer12 = Apb1Timer; |
| 101 | + static constexpr uint32_t Timer13 = Apb1Timer; |
| 102 | + static constexpr uint32_t Timer14 = Apb1Timer; |
| 103 | + static constexpr uint32_t Timer15 = Apb2Timer; |
| 104 | + static constexpr uint32_t Timer16 = Apb2Timer; |
| 105 | + static constexpr uint32_t Timer17 = Apb2Timer; |
| 106 | + |
| 107 | + static constexpr uint32_t Usb = 48_MHz; |
| 108 | + |
| 109 | +#ifdef CORE_CM7 |
| 110 | + static bool inline |
| 111 | + enable() |
| 112 | + { |
| 113 | + Rcc::enableExternalClock(); // 8 MHz |
| 114 | + Rcc::setVoltageScaling(Rcc::VoltageScaling::Scale0); // required for 480MHz |
| 115 | + const Rcc::PllFactors pllFactors { |
| 116 | + .range = Rcc::PllInputRange::MHz4_8, |
| 117 | + .pllM = 1, // 8MHz / M= 8MHz |
| 118 | + .pllN = 120, // 8MHz * N= 960MHz |
| 119 | + .pllP = 2, // 960MHz / P= 480MHz = F_cpu |
| 120 | + .pllQ = 20, // 960MHz / Q= 48MHz |
| 121 | + .pllR = 2, // 960MHz / R= 480MHz |
| 122 | + }; |
| 123 | + Rcc::enablePll1(Rcc::PllSource::ExternalClock, pllFactors); |
| 124 | + Rcc::setFlashLatency<Ahb>(); |
| 125 | + // max 240MHz on AHB |
| 126 | + Rcc::setAhbPrescaler(Rcc::AhbPrescaler::Div2); |
| 127 | + // max 120MHz on APB |
| 128 | + Rcc::setApb1Prescaler(Rcc::Apb1Prescaler::Div2); |
| 129 | + Rcc::setApb2Prescaler(Rcc::Apb2Prescaler::Div2); |
| 130 | + Rcc::setApb3Prescaler(Rcc::Apb3Prescaler::Div2); |
| 131 | + Rcc::setApb4Prescaler(Rcc::Apb4Prescaler::Div2); |
| 132 | + // update clock frequencies |
| 133 | + Rcc::updateCoreFrequency<Frequency>(); |
| 134 | + Rcc::enableUsbClockSource(Rcc::UsbClockSource::Pll1Q); |
| 135 | + // Switch the main clock source to PLL |
| 136 | + Rcc::enableSystemClock(Rcc::SystemClockSource::Pll1P); |
| 137 | + return true; |
| 138 | + } |
| 139 | +#else |
| 140 | + static bool inline |
| 141 | + enable() |
| 142 | + { |
| 143 | + Rcc::updateCoreFrequency<Frequency>(); |
| 144 | + return true; |
| 145 | + } |
| 146 | +#endif |
| 147 | +}; |
| 148 | + |
| 149 | +// Arduino Footprint |
| 150 | +#include "nucleo144_arduino_h745_55.hpp" |
| 151 | + |
| 152 | +using Button = GpioInputC13; |
| 153 | + |
| 154 | +using LedGreen = GpioOutputB0; |
| 155 | +using LedYellow = GpioOutputE1; |
| 156 | +using LedRed = GpioOutputB14; |
| 157 | +using Leds = SoftwareGpioPort<LedRed, LedYellow, LedGreen>; |
| 158 | + |
| 159 | +namespace usb |
| 160 | +{ |
| 161 | +using Vbus = GpioA9; |
| 162 | +using Id = GpioA10; |
| 163 | +using Dm = GpioA11; |
| 164 | +using Dp = GpioA12; |
| 165 | + |
| 166 | +using Overcurrent = GpioInputG7; // OTG_FS_OverCurrent |
| 167 | +using Power = GpioOutputD10; // OTG_FS_PowerSwitchOn |
| 168 | + |
| 169 | +using Device = UsbFs; |
| 170 | +} |
| 171 | + |
| 172 | +namespace stlink |
| 173 | +{ |
| 174 | +using Tx = GpioOutputD8; |
| 175 | +using Rx = GpioInputD9; |
| 176 | +using Uart = Usart3; |
| 177 | +} |
| 178 | + |
| 179 | +#ifdef CORE_CM7 |
| 180 | +using LoggerDevice = modm::IODeviceWrapper<stlink::Uart, modm::IOBuffer::BlockIfFull>; |
| 181 | +#endif |
| 182 | + |
| 183 | +inline void |
| 184 | +initialize() |
| 185 | +{ |
| 186 | + SystemClock::enable(); |
| 187 | + SysTickTimer::initialize<SystemClock>(); |
| 188 | + |
| 189 | +#ifdef CORE_CM7 |
| 190 | + Rcc::bootCortexM4(); |
| 191 | + |
| 192 | + stlink::Uart::connect<stlink::Tx::Tx, stlink::Rx::Rx>(); |
| 193 | + stlink::Uart::initialize<SystemClock, 115200_Bd>(); |
| 194 | + |
| 195 | + LedGreen::setOutput(modm::Gpio::Low); |
| 196 | + LedYellow::setOutput(modm::Gpio::Low); |
| 197 | + LedRed::setOutput(modm::Gpio::Low); |
| 198 | + |
| 199 | + Button::setInput(); |
| 200 | +#endif |
| 201 | +} |
| 202 | + |
| 203 | +inline void |
| 204 | +initializeUsbFs(uint8_t priority=3) |
| 205 | +{ |
| 206 | + usb::Device::initialize<SystemClock>(priority); |
| 207 | + usb::Device::connect<usb::Dm::Dm, usb::Dp::Dp, usb::Id::Id>(); |
| 208 | + usb::Id::configure(Gpio::InputType::Floating); |
| 209 | + |
| 210 | + usb::Overcurrent::setInput(); |
| 211 | + usb::Vbus::setInput(); |
| 212 | + // Enable VBUS sense (B device) via pin PA9 |
| 213 | + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN; |
| 214 | +} |
| 215 | + |
| 216 | +} |
| 217 | +/// @} |
| 218 | + |
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