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[stm32] Fix H7 ADC asynchronous clock
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src/modm/platform/adc/stm32f3/adc.hpp.in

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,16 +163,22 @@ public:
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// ADCs clock source selection
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enum class ClockSource : uint32_t
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{
166-
NoClock = 0, // No clock selected.
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%% if target["family"] in ["g4"]
167+
NoClock = 0, // No clock selected.
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%% if id in [1, 2]
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Pll = RCC_{{ ccipr }}_ADC12SEL_0, // PLL “P” clock selected as ADC clock
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SystemClock = RCC_{{ ccipr }}_ADC12SEL_1 , // System clock selected as ADCs clock
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%% elif id in [3, 4, 5]
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Pll = RCC_{{ ccipr }}_ADC345SEL_0, // PLL “P” clock selected as ADC clock
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SystemClock = RCC_{{ ccipr }}_ADC345SEL_1 , // System clock selected as ADCs clock
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%% endif
175+
%% elif target["family"] in ["h7"]
176+
Pll2P = 0,
177+
Pll3R = RCC_{{ ccipr }}_ADCSEL_0,
178+
PerClk = RCC_{{ ccipr }}_ADCSEL_1,
179+
NoClock = PerClk, // for compatibility if sync. clock is used and setting is ignored
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%% else
181+
NoClock = 0, // No clock selected.
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PllSai1 = RCC_{{ ccipr }}_ADCSEL_0, // PLLSAI1 "R" clock (PLLADC1CLK) selected as ADCs clock
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%% if target["family"] != "l5"
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PllSai2 = RCC_{{ ccipr }}_ADCSEL_1, // PLLSAI2 "R" clock (PLLADC2CLK) selected as ADCs clock
@@ -337,7 +343,11 @@ public:
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static inline void
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initialize( const ClockMode clk = ClockMode::DoNotChange,
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%% if clock_mux
346+
%% if target["family"] == "h7"
347+
const ClockSource clk_src = ClockSource::PerClk,
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%% else
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const ClockSource clk_src = ClockSource::SystemClock,
350+
%% endif
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%% endif
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const Prescaler pre = Prescaler::Disabled,
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const CalibrationMode cal = CalibrationMode::DoNotCalibrate,

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