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1 parent 08306ff commit 5e6f3e7Copy full SHA for 5e6f3e7
src/modm/platform/clock/stm32/rcc.hpp.in
@@ -616,15 +616,15 @@ public:
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* f(VCO clock) = f(PLLI2S clock input) × (PLLI2SN / PLLM)
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* f(PLL I2S clock output) = f(VCO clock) / PLLI2SR
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* \endcode
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- *
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+ *
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* \param pllN
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* PLLI2S multiplication factor for VCO
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* Caution: The software has to set these bits correctly
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* to ensure that the VCO output frequency
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- * is between 100 and 432 MHz.
+ * is between 100 and 432 MHz.
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* 50 <= PLLI2SN <= 432
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* \param pllR
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* PLLI2S division factor for I2S clocks
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* Caution: The I2Ss requires a frequency lower than
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