[ext] Fixes for STM32U5 memory map and rcc

salkinium · salkinium · commit 7548c0f980d5 · 2026-02-10T23:46:25.000+01:00
diff --git a/ext/modm-devices b/ext/modm-devices
@@ -1 +1 @@
-Subproject commit 3bf95d16ae94424076b92b98b82e222750ccb768
+Subproject commit b40814b8fb6406b442bc10e4fc05287b5e6e7888
diff --git a/src/modm/platform/clock/stm32/rcc_u5.hpp.in b/src/modm/platform/clock/stm32/rcc_u5.hpp.in
@@ -763,7 +763,7 @@ public:
 		MsiK     = 0b1001,
 	};
 	static inline void
-	setMco1ClockSource(McoClockSource src, McoPrescaler div)
+	setMcoClockSource(McoClockSource src, McoPrescaler div)
 	{
 		RCC->CFGR1 = (RCC->CFGR1 & ~(RCC_CFGR1_MCOSEL | RCC_CFGR1_MCOPRE)) |
 					 (uint32_t(src) << RCC_CFGR1_MCOSEL_Pos) | (uint32_t(div) << RCC_CFGR1_MCOPRE_Pos);

Original file line number	Diff line number	Diff line change
`@@ -763,7 +763,7 @@ public:`
`763`	`763`	`MsiK = 0b1001,`
`764`	`764`	`};`
`765`	`765`	`static inline void`
`766`		`- setMco1ClockSource(McoClockSource src, McoPrescaler div)`
	`766`	`+ setMcoClockSource(McoClockSource src, McoPrescaler div)`
`767`	`767`	`{`
`768`	`768`	`RCC->CFGR1 = (RCC->CFGR1 & ~(RCC_CFGR1_MCOSEL \| RCC_CFGR1_MCOPRE)) \|`
`769`	`769`	`(uint32_t(src) << RCC_CFGR1_MCOSEL_Pos) \| (uint32_t(div) << RCC_CFGR1_MCOPRE_Pos);`