[architecture] I2sMaster created

Co-authored-by: Raphael Lehmann <[email protected]>

Author: ledneczki

src/modm/architecture/interface/i2s_master.hpp

@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2021, Marton Lednczki
+ * Copyright (c) 2022, Raphael Lehmann
+ *
+ * This file is part of the modm project.
+ *
+ * This Source Code Form is subject to the terms of the Mozilla Public
+ * License, v. 2.0. If a copy of the MPL was not distributed with this
+ * file, You can obtain one at http://mozilla.org/MPL/2.0/.
+ */
+// ----------------------------------------------------------------------------
+
+#ifndef MODM_INTERFACE_I2S_MASTER_HPP
+#define MODM_INTERFACE_I2S_MASTER_HPP
+
+#include <modm/processing/resumable.hpp>
+#include "i2s.hpp"
+
+namespace modm
+{
+
+/**
+ * Interface for a I2S Master
+ *
+ * @author	Marton Ledneczki
+ * @ingroup	modm_architecture_i2s
+ */
+class I2sMaster : public ::modm::PeripheralDriver
+{
+#ifdef __DOXYGEN__
+public:
+	/**
+	 * @brief Connect GPIOs to the peripheral and configure them.
+	 *
+	 * This configures the CK (serial clock), MCK (master clock),
+	 * SD (serial data) and WS (word select) signals and connects them.
+	 *
+	 * @tparam	Signals One CK, SD, WS, MCK signal are required and can be
+	 * passed out-of-order.
+	 */
+	template< class... Signals >
+	static void
+	connect();
+
+	/**
+	 * @brief Initializes the hardware and sets the samplerate.
+	 *
+	 * @tparam SystemClock the currently active system clock
+	 * @tparam samplerate the desired sample rate in Hz
+	 * @tparam tolerance the allowed relative tolerance for the resulting samplerate
+	 */
+	template< class SystemClock, frequency_t samplerate, percent_t tolerance=pct(0.019) >
+	static void
+	initialize();
+
+
+	/**
+	 * @brief Set the buffer
+	 *
+	 * @param address Pointer to the buffer. The user has to ensure the buffer is in DMA-able memory.
+	 * @param length Size of the buffer
+	 */
+	static void
+	setTxBuffer(uintptr_t address, std::size_t length);
+
+	/**
+	 * @brief Set transfer complete handler function
+	 *
+	 * The transfer complete handler should set the next tx buffer using 
+	 * `setTxBuffer()` and then restart the DMA transfer using `startDma()`.
+	 */
+	static void
+	setTransferCompleteIrqHandler(DmaBase::IrqHandler handleDmaTransferComplete);
+
+	/**
+	 * @brief Starts the I2S peripheral
+	 */
+	static void
+	start();
+
+	/**
+	 * @brief (Re-)Starts a DMA transfer
+	 *
+	 * This will be usually called inside the transfer complete handler after
+	 * a (new) tx buffer address was set.
+	 *
+	 * @see setTransferCompleteIrqHandler()
+	 */
+	static void
+	startDma();
+
+	/**
+	 * @brief Stops I2S
+	 */
+	static void
+	stop();
+
+#endif
+};
+
+} // namespace modm
+
+#endif // MODM_INTERFACE_SPI_MASTER_HPP

src/modm/architecture/module.lb

@@ -231,6 +231,20 @@ class I2cMultiplexer(Module):
         env.copy("interface/i2c_multiplexer.hpp")
 # -----------------------------------------------------------------------------
 
+class I2s(Module):
+    def init(self, module):
+        module.name = "i2s"
+        module.description = "Inter-IC Sound (I2S)"
+
+    def prepare(self, module, options):
+        module.depends(":processing:resumable")
+        return True
+
+    def build(self, env):
+        env.outbasepath = "modm/src/modm/architecture"
+        env.copy("interface/i2s_master.hpp")
+# -----------------------------------------------------------------------------
+
 class Interrupt(Module):
     def init(self, module):
         module.name = "interrupt"
@@ -367,6 +381,7 @@ def prepare(module, options):
     module.add_submodule(I2c())
     module.add_submodule(I2cDevice())
     module.add_submodule(I2cMultiplexer())
+    module.add_submodule(I2s())
     module.add_submodule(Interrupt())
     module.add_submodule(Memory())
     module.add_submodule(OneWire())