[stm32] Fix clock enable for internal PHYC

Author: salkinium

ext/hathach/tinyusb

@@ -67,6 +67,7 @@ def generate_instance(env, port, otg=False):
         "port": port,
         "peripheral": "Usbotg{}".format(port) if otg else "Usb",
         "is_otg": otg,
+        "is_phyc": port == "hs" and not is_ulpi,
         "is_remap": irq_data["is_remap"],
         "irqs": irq_data["port_irqs"][port],
         "target": env[":target"].identifier,

src/modm/platform/usb/stm32/module.lb

@@ -43,6 +43,14 @@ public:
 #endif
 %% endif
 		Rcc::enable<Peripheral::{{ peripheral }}>();
+%% if is_phyc
+		Rcc::enable<Peripheral::Usbotghsulpi>();
+#ifdef RCC_APB2ENR_OTGPHYCEN
+		RCC->APB2ENR |= RCC_APB2ENR_OTGPHYCEN; __DSB();
+#elif defined RCC_AHB2ENR1_USBPHYCEN
+		RCC->AHB2ENR1 |= RCC_AHB2ENR1_USBPHYCEN; __DSB();
+#endif
+%% endif
 %% if is_remap
 		SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
 %% endif