[rp] Add core support for RP2040 device

Author: andryblack

.github/workflows/linux.yml

@@ -225,7 +225,7 @@ jobs:
       - name: Quick compile HAL for Cortex-M Part 1
         if: always()
         run: |
-          (cd test/all && python3 run_all.py stm32 sam --quick --split 4 --part 0)
+          (cd test/all && python3 run_all.py stm32 sam rp --quick --split 4 --part 0)
       - name: Upload log artifacts
         uses: actions/upload-artifact@v2
         with:
@@ -245,7 +245,7 @@ jobs:
       - name: Quick compile HAL for Cortex-M Part 2
         if: always()
         run: |
-          (cd test/all && python3 run_all.py stm32 sam --quick --split 4 --part 1)
+          (cd test/all && python3 run_all.py stm32 sam rp --quick --split 4 --part 1)
       - name: Upload log artifacts
         uses: actions/upload-artifact@v2
         with:
@@ -265,7 +265,7 @@ jobs:
       - name: Quick compile HAL for Cortex-M Part 3
         if: always()
         run: |
-          (cd test/all && python3 run_all.py stm32 sam --quick --split 4 --part 2)
+          (cd test/all && python3 run_all.py stm32 sam rp --quick --split 4 --part 2)
       - name: Upload log artifacts
         uses: actions/upload-artifact@v2
         with:
@@ -285,7 +285,7 @@ jobs:
       - name: Quick compile HAL for Cortex-M Part 4
         if: always()
         run: |
-          (cd test/all && python3 run_all.py stm32 sam --quick --split 4 --part 3)
+          (cd test/all && python3 run_all.py stm32 sam rp --quick --split 4 --part 3)
       - name: Upload log artifacts
         uses: actions/upload-artifact@v2
         with:

ext/modm-devices

@@ -87,6 +87,7 @@ class DevicesCache(dict):
                      "stm32l0", "stm32l1", "stm32l4", "stm32l5",
                      "at90", "attiny", "atmega",
                      "samd21", "samg55", "samv70",
+                     "rp2040",
                      "hosted"]
         device_file_names = [dfn for dfn in device_file_names if any(s in dfn for s in supported)]
         # These files are ignored due to various issues
@@ -178,7 +179,7 @@ class TargetOption(EnumerationOption):
         targets = self._enumeration.keys()
 
         # check if input string is part of keys OR longer
-        while(len(target) > len("attiny4-")):
+        while(len(target) >= len("rp2040")):
             if target in targets:
                 target = self._enumeration[target]
                 target._identifier.set("revision", revision.lower())

repo.lb

@@ -46,6 +46,9 @@ def build(env):
     # H742/43: Prescaler not implemented in revY
     elif target.family == "h7" and target.name in ["42", "43", "50", "53"] and target.revision == "y":
         div = 1
+    # RP2040 external reference clock need additional configuration
+    elif target.platform == "rp":
+        div = 1
 
     env.substitutions = {
         "systick_frequency": env.get(":freertos:frequency", freq),

src/modm/platform/clock/systick/module.lb

@@ -16,12 +16,18 @@
 
 #include "../device.hpp"
 #include <modm/architecture/utils.hpp>
+%% if with_multicore
+#include "multicore.hpp"
+%% endif
 
 /// @cond
 namespace modm::atomic
 {
 
 class Lock
+%% if with_multicore
+	: public modm::platform::multicore::CoreLock
+%% endif
 {
 public:
 	modm_always_inline

src/modm/platform/core/cortex/atomic_lock_impl.hpp.in

@@ -69,20 +69,20 @@ MAIN_STACK_SIZE = {{ options[":platform:cortex-m:main_stack_size"] }};
 %% endmacro
 
 
-%% macro section_stack(memory, start=None)
-	/* Main stack in {{memory}} */
-	.stack (NOLOAD) :
+%% macro section_stack(memory, start=None, suffix="")
+	/* Main stack{{suffix}} in {{memory}} */
+	.stack{{suffix}} (NOLOAD) :
 	{
 	%% if start != None
-		. += {{ start }};
+		. += {{start}};
 	%% endif
-		__stack_start = .;
+		__stack{{suffix}}_start = .;
 
 		. += MAIN_STACK_SIZE;
 		. = ALIGN(8);
-		__main_stack_top = .;
+		__main{{suffix}}_stack_top = .;
 
-		__stack_end = .;
+		__stack{{suffix}}_end = .;
 	} >{{memory}}
 %% endmacro
 

src/modm/platform/core/cortex/linker.macros

@@ -286,6 +286,7 @@ def build(env):
         "with_memory_traits": env.has_module(":architecture:memory"),
         "with_assert": env.has_module(":architecture:assert"),
         "with_fpu": env.get("float-abi", "soft") != "soft",
+        "with_multicore": env.has_module(":platform:multicore"),
     })
     env.outbasepath = "modm/src/modm/platform/core"
 

src/modm/platform/core/cortex/module.lb

@@ -142,8 +142,9 @@ The following macros are available:
 - `section_load(memory, table_copy, sections)`: place each `.{section}` in
   `sections` into `memory` and add them the copy table.
 
-- `section_stack(memory, start=None)`: place the main stack into `memory` after
-  moving the location counter to `start`.
+- `section_stack(memory, start=None, suffix="")`: place the main stack into
+  `memory` after moving the location counter to `start`. `suffix` can be used
+  to add multiple `.stack{suffix}` sections.
 
 - `section_heap(memory, name, placement=None, sections=[])`: Add the noload
   `sections` to `memory` and fill up remaining space in `memory` with heap

src/modm/platform/core/cortex/module.md

@@ -0,0 +1,102 @@
+%% import "../cortex/linker.macros" as linker with context
+{{ linker.copyright() }}
+
+{{ linker.prefix() }}
+%% set table_heap = []
+%% set table_copy = []
+%% set table_zero = []
+
+SECTIONS
+{
+{{ linker.section_rom_start("FLASH") }}
+
+	.boot2 :
+	{
+		__boot2_start__ = .;
+		KEEP (*(.boot2))
+		__boot2_end__ = .;
+	} > FLASH
+	ASSERT(__boot2_end__ - __boot2_start__ == 256,
+		   "ERROR: Pico second stage bootloader must be 256 bytes in size!")
+
+	.text :
+	{
+		__vector_table_rom_start = .;
+		__vector_table_ram_load = .;
+		KEEP(*(.vector_rom))
+		__vector_table_rom_end = .;
+	} > FLASH
+
+{{ linker.section_rom("FLASH") }}
+
+
+%% if vector_table_location == "ram"
+{{ linker.section_vector_ram("RAM", table_copy) }}
+%% endif
+
+{{ linker.section_ram(cont_ram_regions[0].cont_name|upper, "FLASH", table_copy, table_zero,
+					  sections_data=["fastdata", "fastcode", "data_" + cont_ram_regions[0].contains[0].name],
+					  sections_bss=["bss_" + cont_ram_regions[0].contains[0].name],
+					  sections_noinit=["faststack"]) }}
+
+{{ linker.all_heap_sections(table_copy, table_zero, table_heap) }}
+
+%% if with_crashcatcher
+	%#
+	/* Bottom of crash stack for `modm:platform:fault` */
+	g_crashCatcherStack = . - 500;
+	%#
+%% endif
+
+%% macro section_mem_bank(memory, section, alt_name)
+	/* Sections in {{memory}} */
+	.data_{{memory | lower}} :
+	{
+		__{{section}}_data_load = LOADADDR(.data_{{memory | lower}});
+		__{{section}}_data_start = .;
+		 *(.data_{{section}} .data_{{section}}.*)
+		 *(.{{alt_name}})
+		. = ALIGN(4);
+		__{{section}}_data_end = .;
+	} >{{memory}} AT > FLASH
+	%% do table_copy.append(section + "_data")
+	%#
+	.bss_{{memory | lower}} (NOLOAD) :
+	{
+		__{{section}}_bss_start = . ;
+		*(.bss_{{section}} .bss_{{section}}.*)
+		. = ALIGN(4);
+		__{{section}}_bss_end = . ;
+	} >{{memory}}
+	%% do table_zero.append(section + "_bss")
+	%#
+	.noinit_{{memory | lower}} (NOLOAD) :
+	{
+		__{{section}}_noinit_start = . ;
+		*(.noinit_{{section}} .noinit_{{section}}.*)
+		. = ALIGN(4);
+		__{{section}}_noinit_end = . ;
+	} >{{memory}}
+%% endmacro
+
+%% if with_multicore
+{{ linker.section_stack("CORE1", suffix="1") }}
+%% endif
+{{ section_mem_bank("CORE1", "core1", "scratch_x") }}
+
+
+{{ linker.section_stack("CORE0") }}
+
+{{ section_mem_bank("CORE0", "core0", "scratch_y") }}
+
+%% if linkerscript_sections
+{{ linkerscript_sections | indent(first=True) }}
+	%#
+%% endif
+
+{{ linker.section_tables("FLASH", table_copy, table_zero, table_heap) }}
+
+{{ linker.section_rom_end("FLASH") }}
+
+{{ linker.section_debug() }}
+}

src/modm/platform/core/rp/flash.ld.in

@@ -0,0 +1,73 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+#
+# Copyright (c) 2019, Ethan Slattery
+# Copyright (c) 2021, Niklas Hauser
+# Copyright (c) 2022, Andrey Kunitsyn
+#
+# This file is part of the modm project.
+#
+# This Source Code Form is subject to the terms of the Mozilla Public
+# License, v. 2.0. If a copy of the MPL was not distributed with this
+# file, You can obtain one at http://mozilla.org/MPL/2.0/.
+# -----------------------------------------------------------------------------
+
+import math
+
+def init(module):
+    module.name = ":platform:core"
+    module.description = FileReader("module.md")
+
+def prepare(module, options):
+    if options[":target"].identifier.platform != "rp":
+        return False
+
+    module.depends(":platform:cortex-m")
+    module.add_option(
+        EnumerationOption(
+            name="boot2",
+            description="Second-stage bootloader variant",
+            enumeration=["generic_03h", "at25sf128a", "is25lp080", "w25q080", "w25x10cl"],
+            default="generic_03h"))
+    return True
+
+
+def build(env):
+    target = env[":target"].identifier
+
+    env.substitutions = {"with_multicore": env.has_module(":platform:multicore")}
+    env.outbasepath = "modm/src/modm/platform/core"
+    # startup helper code
+    env.template("startup_platform.cpp.in")
+
+    # delay code that must be tuned for each family
+    # (cycles per loop, setup cost in loops, max CPU freq)
+    tuning = {
+        "20": (3, 4, 133000000)
+    }[target.family]
+
+    # us_shift is an optimization to limit error via fractional math
+    us_shift = 32 - math.ceil(math.log2(tuning[2]))
+
+    env.substitutions.update({
+        "with_cm0": env[":target"].has_driver("core:cortex-m0*"),
+        "with_cm7": env[":target"].has_driver("core:cortex-m7*"),
+        "loop": tuning[0],
+        "shift": int(math.log2(tuning[1])),
+        "us_shift": us_shift,
+        "with_assert": env.has_module(":architecture:assert")
+    })
+    env.template("../cortex/delay_ns.cpp.in", "delay_ns.cpp")
+    env.template("../cortex/delay_ns.hpp.in", "delay_ns.hpp")
+    env.template("../cortex/delay_impl.hpp.in", "delay_impl.hpp")
+    env.copy("resets.hpp")
+
+    env.copy(repopath("ext/rp/pico-sdk/src/boot2_{}.cpp".format(env["boot2"])),"boot2.cpp")
+
+
+def post_build(env):
+    env.substitutions = env.query("::cortex-m:linkerscript")
+    env.substitutions.update(env.query("::cortex-m:vector_table"))
+    env.substitutions["with_multicore"] = env.has_module(":platform:multicore")
+    env.outbasepath = "modm/link"
+    env.template("flash.ld.in", "linkerscript.ld")