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fixup: i2s
1 parent a0eb1a5 commit cb61d8e

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3 files changed

+24
-22
lines changed

3 files changed

+24
-22
lines changed

src/modm/platform/i2s/stm32/i2s_hal.hpp.in

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,12 @@ public:
5656
BitDepth bitDepth = BitDepth::Sixteen,
5757
MasterClockOutput masterClockOutput = MasterClockOutput::Enabled);
5858

59+
static void
60+
start();
61+
62+
static void
63+
stop();
64+
5965
static void
6066
write(uint16_t sample);
6167

src/modm/platform/i2s/stm32/i2s_hal_impl.hpp.in

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,11 @@ modm::platform::I2sHal{{ id }}::initialize( OddFactor oddFactor, uint8_t i2s_div
5252
SPI{{ id }}->I2SPR |= static_cast<uint32_t>(masterClockOutput) |
5353
static_cast<uint32_t>(oddFactor) |
5454
i2s_div;
55-
// re-enable peripheral
55+
}
56+
57+
void inline
58+
modm::platform::I2sHal3::start()
59+
{
5660
SPI{{ id }}->I2SCFGR |= SPI_I2SCFGR_I2SE;
5761
}
5862

src/modm/platform/i2s/stm32/i2s_master.hpp.in

Lines changed: 13 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -31,9 +31,10 @@ namespace platform
3131
*
3232
* TODO: say something about the nature of implementation
3333
*
34-
* @tparam DmaChannelTX DMA channel for sending
34+
* @tparam DmaChannelTX DMA channel for sending
3535
*
36-
* @author Marton Ledneczki, Raphael Lehmann
36+
* @author Marton Ledneczki
37+
* @author Raphael Lehmann
3738
* @ingroup modm_platform_i2s modm_platform_i2s_{{id}}
3839
*/
3940
template <class DmaChannelTx>
@@ -46,10 +47,11 @@ class I2sMaster{{ id }} : public modm::I2sMaster
4647
Peripheral::Spi{{ id }}, DmaBase::Signal::Tx>::Request;
4748
};
4849

49-
public:
50+
public: // TBD: private?
5051
using Hal = I2sHal{{ id }};
5152

5253

54+
public:
5355
template< class... Signals >
5456
static void
5557
connect()
@@ -83,11 +85,12 @@ public:
8385
Hal::initialize(odd_factor ? Hal::OddFactor::Enabled : Hal::OddFactor::Disabled,
8486
i2s_div);
8587

88+
dmaError = false;
8689
Dma::TxChannel::configure(
8790
DmaBase::DataTransferDirection::MemoryToPeripheral, DmaBase::MemoryDataSize::Bit16,
8891
DmaBase::PeripheralDataSize::Bit16, DmaBase::MemoryIncrementMode::Increment,
8992
DmaBase::PeripheralIncrementMode::Fixed, dmaPriority,
90-
DmaBase::CircularMode::Disabled, DmaBase::DoubleBufferMode::Enabled);
93+
DmaBase::CircularMode::Disabled);
9194
Dma::TxChannel::setPeripheralAddress(SPI{{ id }}_BASE + 0x0c);
9295
Dma::TxChannel::setTransferErrorIrqHandler(handleDmaTransferError);
9396
Dma::TxChannel::enableInterruptVector();
@@ -97,40 +100,29 @@ public:
97100
}
98101

99102
static inline void
100-
setTxBufferAddresses(uintptr_t first_address, uintptr_t second_address, std::size_t length)
103+
setTxBufferAddresses(uintptr_t address, std::size_t length)
101104
{
102-
Dma::TxChannel::setMemoryAddress(first_address);
103-
Dma::TxChannel::setMemoryAddress2(second_address);
105+
Dma::TxChannel::setMemoryAddress(address);
104106
Dma::TxChannel::setDataLength(length);
105107
}
106108

107109
static inline void
108-
setTxBufferAddress1(uintptr_t first_address)
109-
{
110-
Dma::TxChannel::setMemoryAddress(first_address);
111-
}
112-
113-
static inline void
114-
setTxBufferAddress2( uintptr_t second_address)
115-
{
116-
Dma::TxChannel::setMemoryAddress2(second_address);
117-
}
118-
119-
static inline bool
120-
isBuffer1Active()
110+
setTransferCompleteIrqHandler(DmaBase::IrqHandler handleDmaTransferComplete)
121111
{
122-
return Dma::TxChannel::isPrimaryBufferActive();
112+
Dma::TxChannel::setTransferCompleteIrqHandler(handleDmaTransferComplete);
123113
}
124114

125115
static inline void
126116
start()
127117
{
128118
Dma::TxChannel::start();
119+
Hal::start();
129120
}
130121

131122
static inline void
132123
stop()
133124
{
125+
//Hal::stop();
134126
Dma::TxChannel::stop();
135127
}
136128

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