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[CodeGen] Use getObjectPtrOffset to generate loads/stores for mem intrinsics (llvm#80184)
This causes address arithmetic to be generated with the 'nuw' flag, allowing WebAssembly constant offset folding. Fixes llvm#79692
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2 files changed

+56
-8
lines changed

2 files changed

+56
-8
lines changed

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8783,7 +8783,7 @@ static SDValue getMemcpyLoadsAndStores(
87838783
if (Value.getNode()) {
87848784
Store = DAG.getStore(
87858785
Chain, dl, Value,
8786-
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
8786+
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
87878787
DstPtrInfo.getWithOffset(DstOff), Alignment, MMOFlags, NewAAInfo);
87888788
OutChains.push_back(Store);
87898789
}
@@ -8799,7 +8799,7 @@ static SDValue getMemcpyLoadsAndStores(
87998799
assert(NVT.bitsGE(VT));
88008800

88018801
bool isDereferenceable =
8802-
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
8802+
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
88038803
MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
88048804
if (isDereferenceable)
88058805
SrcMMOFlags |= MachineMemOperand::MODereferenceable;
@@ -8808,14 +8808,14 @@ static SDValue getMemcpyLoadsAndStores(
88088808

88098809
Value = DAG.getExtLoad(
88108810
ISD::EXTLOAD, dl, NVT, Chain,
8811-
DAG.getMemBasePlusOffset(Src, TypeSize::getFixed(SrcOff), dl),
8811+
DAG.getObjectPtrOffset(dl, Src, TypeSize::getFixed(SrcOff)),
88128812
SrcPtrInfo.getWithOffset(SrcOff), VT,
88138813
commonAlignment(*SrcAlign, SrcOff), SrcMMOFlags, NewAAInfo);
88148814
OutLoadChains.push_back(Value.getValue(1));
88158815

88168816
Store = DAG.getTruncStore(
88178817
Chain, dl, Value,
8818-
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
8818+
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
88198819
DstPtrInfo.getWithOffset(DstOff), VT, Alignment, MMOFlags, NewAAInfo);
88208820
OutStoreChains.push_back(Store);
88218821
}
@@ -8945,14 +8945,14 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
89458945
SDValue Value;
89468946

89478947
bool isDereferenceable =
8948-
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
8948+
SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
89498949
MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
89508950
if (isDereferenceable)
89518951
SrcMMOFlags |= MachineMemOperand::MODereferenceable;
89528952

89538953
Value = DAG.getLoad(
89548954
VT, dl, Chain,
8955-
DAG.getMemBasePlusOffset(Src, TypeSize::getFixed(SrcOff), dl),
8955+
DAG.getObjectPtrOffset(dl, Src, TypeSize::getFixed(SrcOff)),
89568956
SrcPtrInfo.getWithOffset(SrcOff), *SrcAlign, SrcMMOFlags, NewAAInfo);
89578957
LoadValues.push_back(Value);
89588958
LoadChains.push_back(Value.getValue(1));
@@ -8967,7 +8967,7 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
89678967

89688968
Store = DAG.getStore(
89698969
Chain, dl, LoadValues[i],
8970-
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
8970+
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
89718971
DstPtrInfo.getWithOffset(DstOff), Alignment, MMOFlags, NewAAInfo);
89728972
OutChains.push_back(Store);
89738973
DstOff += VTSize;
@@ -9099,7 +9099,7 @@ static SDValue getMemsetStores(SelectionDAG &DAG, const SDLoc &dl,
90999099
assert(Value.getValueType() == VT && "Value with wrong type.");
91009100
SDValue Store = DAG.getStore(
91019101
Chain, dl, Value,
9102-
DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl),
9102+
DAG.getObjectPtrOffset(dl, Dst, TypeSize::getFixed(DstOff)),
91039103
DstPtrInfo.getWithOffset(DstOff), Alignment,
91049104
isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone,
91059105
NewAAInfo);
Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc < %s -mcpu=mvp -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
3+
4+
; This test ensures that loads and stores generated for small memcpy et al use
5+
; constant offset folding.
6+
7+
8+
target triple = "wasm32-unknown-unknown"
9+
10+
define void @call_memset(ptr) #0 {
11+
; CHECK-LABEL: call_memset:
12+
; CHECK: .functype call_memset (i32) -> ()
13+
; CHECK-NEXT: # %bb.0:
14+
; CHECK-NEXT: i64.const $push0=, 0
15+
; CHECK-NEXT: i64.store 8($0):p2align=0, $pop0
16+
; CHECK-NEXT: i64.const $push1=, 0
17+
; CHECK-NEXT: i64.store 0($0):p2align=0, $pop1
18+
; CHECK-NEXT: # fallthrough-return
19+
call void @llvm.memset.p0.i32(ptr align 1 %0, i8 0, i32 16, i1 false)
20+
ret void
21+
}
22+
23+
define void @call_memcpy(ptr %dst, ptr %src) #0 {
24+
; CHECK-LABEL: call_memcpy:
25+
; CHECK: .functype call_memcpy (i32, i32) -> ()
26+
; CHECK-NEXT: # %bb.0:
27+
; CHECK-NEXT: i64.load $push0=, 8($1):p2align=0
28+
; CHECK-NEXT: i64.store 8($0):p2align=0, $pop0
29+
; CHECK-NEXT: i64.load $push1=, 0($1):p2align=0
30+
; CHECK-NEXT: i64.store 0($0):p2align=0, $pop1
31+
; CHECK-NEXT: # fallthrough-return
32+
call void @llvm.memcpy.p0.p0.i32(ptr align 1 %dst, ptr align 1 %src, i32 16, i1 false)
33+
ret void
34+
}
35+
36+
37+
define void @call_memmove(ptr %dst, ptr %src) #0 {
38+
; CHECK-LABEL: call_memmove:
39+
; CHECK: .functype call_memmove (i32, i32) -> ()
40+
; CHECK-NEXT: # %bb.0:
41+
; CHECK-NEXT: i64.load $2=, 0($1):p2align=0
42+
; CHECK-NEXT: i64.load $push0=, 8($1):p2align=0
43+
; CHECK-NEXT: i64.store 8($0):p2align=0, $pop0
44+
; CHECK-NEXT: i64.store 0($0):p2align=0, $2
45+
; CHECK-NEXT: # fallthrough-return
46+
call void @llvm.memmove.p0.p0.i32(ptr align 1 %dst, ptr align 1 %src, i32 16, i1 false)
47+
ret void
48+
}

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