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Linus Walleij
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Merge tag 'renesas-pinctrl-for-v6.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.12 (take two) - Miscellaneous fixes and improvements. Signed-off-by: Linus Walleij <[email protected]>
2 parents ae4e845 + 1325820 commit dbf0e9d

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3 files changed

+28
-50
lines changed

3 files changed

+28
-50
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‎drivers/pinctrl/renesas/pinctrl-rzg2l.c‎

Lines changed: 26 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
#include <linux/of.h>
1717
#include <linux/of_irq.h>
1818
#include <linux/platform_device.h>
19+
#include <linux/property.h>
1920
#include <linux/seq_file.h>
2021
#include <linux/spinlock.h>
2122

@@ -51,27 +52,23 @@
5152
#define PIN_CFG_IO_VMC_QSPI BIT(7)
5253
#define PIN_CFG_IO_VMC_ETH0 BIT(8)
5354
#define PIN_CFG_IO_VMC_ETH1 BIT(9)
54-
#define PIN_CFG_FILONOFF BIT(10)
55-
#define PIN_CFG_FILNUM BIT(11)
56-
#define PIN_CFG_FILCLKSEL BIT(12)
57-
#define PIN_CFG_IOLH_C BIT(13)
58-
#define PIN_CFG_SOFT_PS BIT(14)
59-
#define PIN_CFG_OEN BIT(15)
60-
#define PIN_CFG_NOGPIO_INT BIT(16)
61-
#define PIN_CFG_NOD BIT(17) /* N-ch Open Drain */
62-
#define PIN_CFG_SMT BIT(18) /* Schmitt-trigger input control */
63-
#define PIN_CFG_ELC BIT(19)
64-
#define PIN_CFG_IOLH_RZV2H BIT(20)
55+
#define PIN_CFG_NF BIT(10) /* Digital noise filter */
56+
#define PIN_CFG_IOLH_C BIT(11)
57+
#define PIN_CFG_SOFT_PS BIT(12)
58+
#define PIN_CFG_OEN BIT(13)
59+
#define PIN_CFG_NOGPIO_INT BIT(14)
60+
#define PIN_CFG_NOD BIT(15) /* N-ch Open Drain */
61+
#define PIN_CFG_SMT BIT(16) /* Schmitt-trigger input control */
62+
#define PIN_CFG_ELC BIT(17)
63+
#define PIN_CFG_IOLH_RZV2H BIT(18)
6564

6665
#define RZG2L_SINGLE_PIN BIT_ULL(63) /* Dedicated pin */
6766
#define RZG2L_VARIABLE_CFG BIT_ULL(62) /* Variable cfg for port pins */
6867

6968
#define RZG2L_MPXED_COMMON_PIN_FUNCS(group) \
7069
(PIN_CFG_IOLH_##group | \
7170
PIN_CFG_PUPD | \
72-
PIN_CFG_FILONOFF | \
73-
PIN_CFG_FILNUM | \
74-
PIN_CFG_FILCLKSEL)
71+
PIN_CFG_NF)
7572

7673
#define RZG2L_MPXED_PIN_FUNCS (RZG2L_MPXED_COMMON_PIN_FUNCS(A) | \
7774
PIN_CFG_SR)
@@ -84,10 +81,7 @@
8481
PIN_CFG_SR | \
8582
PIN_CFG_SMT)
8683

87-
#define RZG2L_MPXED_ETH_PIN_FUNCS(x) ((x) | \
88-
PIN_CFG_FILONOFF | \
89-
PIN_CFG_FILNUM | \
90-
PIN_CFG_FILCLKSEL)
84+
#define RZG2L_MPXED_ETH_PIN_FUNCS(x) ((x) | PIN_CFG_NF)
9185

9286
#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(61, 54)
9387
#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(53, 46)
@@ -394,13 +388,13 @@ static const u64 r9a09g057_variable_pin_cfg[] = {
394388
#ifdef CONFIG_RISCV
395389
static const u64 r9a07g043f_variable_pin_cfg[] = {
396390
RZG2L_VARIABLE_PIN_CFG_PACK(20, 0, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
397-
PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
391+
PIN_CFG_NF |
398392
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT),
399393
RZG2L_VARIABLE_PIN_CFG_PACK(20, 1, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
400-
PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
394+
PIN_CFG_NF |
401395
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT),
402396
RZG2L_VARIABLE_PIN_CFG_PACK(20, 2, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
403-
PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
397+
PIN_CFG_NF |
404398
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT),
405399
RZG2L_VARIABLE_PIN_CFG_PACK(20, 3, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
406400
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT),
@@ -431,7 +425,7 @@ static const u64 r9a07g043f_variable_pin_cfg[] = {
431425
RZG2L_VARIABLE_PIN_CFG_PACK(24, 4, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
432426
PIN_CFG_NOGPIO_INT),
433427
RZG2L_VARIABLE_PIN_CFG_PACK(24, 5, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
434-
PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
428+
PIN_CFG_NF |
435429
PIN_CFG_NOGPIO_INT),
436430
};
437431
#endif
@@ -528,8 +522,7 @@ static int rzg2l_map_add_config(struct pinctrl_map *map,
528522
{
529523
unsigned long *cfgs;
530524

531-
cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
532-
GFP_KERNEL);
525+
cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL);
533526
if (!cfgs)
534527
return -ENOMEM;
535528

@@ -1392,9 +1385,9 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
13921385

13931386
for (i = 0; i < num_configs; i++) {
13941387
param = pinconf_to_config_param(_configs[i]);
1388+
arg = pinconf_to_config_argument(_configs[i]);
13951389
switch (param) {
13961390
case PIN_CONFIG_INPUT_ENABLE:
1397-
arg = pinconf_to_config_argument(_configs[i]);
13981391

13991392
if (!(cfg & PIN_CFG_IEN))
14001393
return -EINVAL;
@@ -1403,7 +1396,6 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
14031396
break;
14041397

14051398
case PIN_CONFIG_OUTPUT_ENABLE:
1406-
arg = pinconf_to_config_argument(_configs[i]);
14071399
if (!(cfg & PIN_CFG_OEN))
14081400
return -EINVAL;
14091401
if (!pctrl->data->oen_write)
@@ -1414,12 +1406,10 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
14141406
break;
14151407

14161408
case PIN_CONFIG_POWER_SOURCE:
1417-
settings.power_source = pinconf_to_config_argument(_configs[i]);
1409+
settings.power_source = arg;
14181410
break;
14191411

14201412
case PIN_CONFIG_SLEW_RATE:
1421-
arg = pinconf_to_config_argument(_configs[i]);
1422-
14231413
if (!(cfg & PIN_CFG_SR) || arg > 1)
14241414
return -EINVAL;
14251415

@@ -1440,8 +1430,6 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
14401430
break;
14411431

14421432
case PIN_CONFIG_DRIVE_STRENGTH:
1443-
arg = pinconf_to_config_argument(_configs[i]);
1444-
14451433
if (!(cfg & PIN_CFG_IOLH_A) || hwcfg->drive_strength_ua)
14461434
return -EINVAL;
14471435

@@ -1461,12 +1449,10 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
14611449
!hwcfg->drive_strength_ua)
14621450
return -EINVAL;
14631451

1464-
settings.drive_strength_ua = pinconf_to_config_argument(_configs[i]);
1452+
settings.drive_strength_ua = arg;
14651453
break;
14661454

14671455
case PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS:
1468-
arg = pinconf_to_config_argument(_configs[i]);
1469-
14701456
if (!(cfg & PIN_CFG_IOLH_B) || !hwcfg->iolh_groupb_oi[0])
14711457
return -EINVAL;
14721458

@@ -1484,7 +1470,6 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
14841470
if (!(cfg & PIN_CFG_IOLH_RZV2H))
14851471
return -EINVAL;
14861472

1487-
arg = pinconf_to_config_argument(_configs[i]);
14881473
if (arg > 3)
14891474
return -EINVAL;
14901475
rzg2l_rmw_pin_config(pctrl, IOLH(off), bit, IOLH_MASK, arg);
@@ -1887,17 +1872,15 @@ static const u64 r9a07g043_gpio_configs[] = {
18871872
#ifdef CONFIG_RISCV
18881873
/* Below additional port pins (P19 - P28) are exclusively available on RZ/Five SoC only */
18891874
RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x06, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
1890-
PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
1891-
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P19 */
1875+
PIN_CFG_NF | PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P19 */
18921876
RZG2L_GPIO_PORT_PACK_VARIABLE(8, 0x07), /* P20 */
18931877
RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x08, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
18941878
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P21 */
18951879
RZG2L_GPIO_PORT_PACK(4, 0x09, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_PUPD |
18961880
PIN_CFG_IEN | PIN_CFG_NOGPIO_INT), /* P22 */
18971881
RZG2L_GPIO_PORT_SPARSE_PACK_VARIABLE(0x3e, 0x0a), /* P23 */
18981882
RZG2L_GPIO_PORT_PACK_VARIABLE(6, 0x0b), /* P24 */
1899-
RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x0c, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_FILONOFF |
1900-
PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL |
1883+
RZG2L_GPIO_PORT_SPARSE_PACK(0x2, 0x0c, PIN_CFG_IOLH_B | PIN_CFG_SR | PIN_CFG_NF |
19011884
PIN_CFG_NOGPIO_INT), /* P25 */
19021885
0x0, /* P26 */
19031886
0x0, /* P27 */
@@ -1975,8 +1958,7 @@ static const struct {
19751958
struct rzg2l_dedicated_configs rzg2l_pins[7];
19761959
} rzg2l_dedicated_pins = {
19771960
.common = {
1978-
{ "NMI", RZG2L_SINGLE_PIN_PACK(0x1, 0,
1979-
(PIN_CFG_FILONOFF | PIN_CFG_FILNUM | PIN_CFG_FILCLKSEL)) },
1961+
{ "NMI", RZG2L_SINGLE_PIN_PACK(0x1, 0, PIN_CFG_NF) },
19801962
{ "TMS/SWDIO", RZG2L_SINGLE_PIN_PACK(0x2, 0,
19811963
(PIN_CFG_IOLH_A | PIN_CFG_SR | PIN_CFG_IEN)) },
19821964
{ "TDO", RZG2L_SINGLE_PIN_PACK(0x3, 0,
@@ -2057,8 +2039,7 @@ static const struct {
20572039
};
20582040

20592041
static const struct rzg2l_dedicated_configs rzg3s_dedicated_pins[] = {
2060-
{ "NMI", RZG2L_SINGLE_PIN_PACK(0x0, 0, (PIN_CFG_FILONOFF | PIN_CFG_FILNUM |
2061-
PIN_CFG_FILCLKSEL)) },
2042+
{ "NMI", RZG2L_SINGLE_PIN_PACK(0x0, 0, PIN_CFG_NF) },
20622043
{ "TMS/SWDIO", RZG2L_SINGLE_PIN_PACK(0x1, 0, (PIN_CFG_IOLH_A | PIN_CFG_IEN |
20632044
PIN_CFG_SOFT_PS)) },
20642045
{ "TDO", RZG2L_SINGLE_PIN_PACK(0x1, 1, (PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS)) },
@@ -2097,8 +2078,7 @@ static const struct rzg2l_dedicated_configs rzg3s_dedicated_pins[] = {
20972078
};
20982079

20992080
static struct rzg2l_dedicated_configs rzv2h_dedicated_pins[] = {
2100-
{ "NMI", RZG2L_SINGLE_PIN_PACK(0x1, 0, (PIN_CFG_FILONOFF | PIN_CFG_FILNUM |
2101-
PIN_CFG_FILCLKSEL)) },
2081+
{ "NMI", RZG2L_SINGLE_PIN_PACK(0x1, 0, PIN_CFG_NF) },
21022082
{ "TMS_SWDIO", RZG2L_SINGLE_PIN_PACK(0x3, 0, (PIN_CFG_IOLH_RZV2H | PIN_CFG_SR |
21032083
PIN_CFG_IEN)) },
21042084
{ "TDO", RZG2L_SINGLE_PIN_PACK(0x3, 2, (PIN_CFG_IOLH_RZV2H | PIN_CFG_SR)) },
@@ -2624,7 +2604,7 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl *pctrl)
26242604

26252605
girq = &chip->irq;
26262606
gpio_irq_chip_set_chip(girq, &rzg2l_gpio_irqchip);
2627-
girq->fwnode = of_node_to_fwnode(np);
2607+
girq->fwnode = dev_fwnode(pctrl->dev);
26282608
girq->parent_domain = parent_domain;
26292609
girq->child_to_parent_hwirq = rzg2l_gpio_child_to_parent_hwirq;
26302610
girq->populate_parent_alloc_arg = rzg2l_gpio_populate_parent_fwspec;

‎drivers/pinctrl/renesas/pinctrl-rzv2m.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,7 @@ static int rzv2m_map_add_config(struct pinctrl_map *map,
196196
{
197197
unsigned long *cfgs;
198198

199-
cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
200-
GFP_KERNEL);
199+
cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL);
201200
if (!cfgs)
202201
return -ENOMEM;
203202

‎drivers/pinctrl/renesas/pinctrl.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -83,8 +83,7 @@ static int sh_pfc_map_add_config(struct pinctrl_map *map,
8383
{
8484
unsigned long *cfgs;
8585

86-
cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
87-
GFP_KERNEL);
86+
cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL);
8887
if (cfgs == NULL)
8988
return -ENOMEM;
9089

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