dts: add MSPM0 family to the devicetree

added TI MSPM0 device support to the devicetree

Signed-off-by: Jackson Farley <[email protected]>

Author: JFMSP

dts/arm/ti/mspm0g1x0x_g3x0x/mspm0g1x0x_g3x0x.dtsi

@@ -0,0 +1,92 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <arm/armv6-m.dtsi>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+
+/ {
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "arm,cortex-m0plus";
+			reg = <0>;
+		};
+	};
+
+	sram0: memory@20200000 {
+		compatible = "mmio-sram";
+	};
+
+	flash0: serial-flash@0 {
+		compatible = "serial-flash";
+	};
+
+	sysclk: system-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <32000000>;
+		#clock-cells = <0>;
+	};
+
+	soc {
+
+		pinctrl: pin-controller@400a0000{
+			compatible = "ti,mspm0-pinctrl";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x400a0000 0x4000>;
+
+			gpioa: gpio@400a0000 {
+				compatible = "ti,mspm0-gpio";
+				reg = <0x400a0000 0x2000>;
+				interrupts = <1 0>;
+				status = "disabled";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			gpiob: gpio@400a2000 {
+				compatible = "ti,mspm0-gpio";
+				reg = <0x400a2000 0x2000>;
+				interrupts = <1 0>;
+				status = "disabled";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+		};
+
+		uart0: uart@40108000 {
+			compatible = "ti,mspm0-uart";
+			reg = <0x40108000 0x2000>;
+			interrupts = <15 0>;
+			current-speed = <115200>;
+			clocks = <&sysclk>;
+			status = "disabled";
+		};
+
+		uart1: uart@40100000 {
+			compatible = "ti,mspm0-uart";
+			reg = <0x40100000 0x2000>;
+			interrupts = <13 0>;
+			current-speed = <115200>;
+			clocks = <&sysclk>;
+			status = "disabled";
+		};
+
+		uart2: uart@40102000 {
+			compatible = "ti,mspm0-uart";
+			reg = <0x40102000 0x2000>;
+			interrupts = <14 0>;
+			current-speed = <115200>;
+			clocks = <&sysclk>;
+			status = "disabled";
+		};
+
+	};
+};
+
+&nvic {
+	arm,num-irq-priority-bits = <2>;
+};

dts/arm/ti/mspm0g1x0x_g3x0x/mspm0g3507.dtsi

@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <ti/mspm0g1x0x_g3x0x/mspm0g1x0x_g3x0x.dtsi>
+#include <ti/mspm0g1x0x_g3x0x/mspm0gxxx7.dtsi>

dts/arm/ti/mspm0g1x0x_g3x0x/mspm0gxxx7.dtsi

@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <mem.h>
+#include <ti/mspm0g1x0x_g3x0x/mspm0g1x0x_g3x0x.dtsi>
+
+/ {
+	sram0: memory@20200000 {
+		reg = <0x20200000 DT_SIZE_K(32)>;
+	};
+
+	flash0: serial-flash@0 {
+		reg = <0x0 DT_SIZE_K(128)>;
+	};
+};