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mstasiaknordicmasz-nordic
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[nrf fromlist] drivers: spi: spi_nrfx_spis: use standard instantiation
Used API for standard instantiation and replaced nrfx_err_t error values with errno. Upstream PR #: 96792 Signed-off-by: Michał Stasiak <[email protected]>
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‎drivers/spi/spi_nrfx_spis.c‎

Lines changed: 68 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

7+
#define DT_DRV_COMPAT nordic_nrf_spis
8+
79
#include <zephyr/drivers/spi.h>
810
#include <zephyr/drivers/spi/rtio.h>
911
#include <zephyr/drivers/pinctrl.h>
@@ -28,25 +30,12 @@ LOG_MODULE_REGISTER(spi_nrfx_spis, CONFIG_SPI_LOG_LEVEL);
2830
BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
2931
#endif
3032

31-
/*
32-
* Current factors requiring use of DT_NODELABEL:
33-
*
34-
* - HAL design (requirement of drv_inst_idx in nrfx_spis_t)
35-
* - Name-based HAL IRQ handlers, e.g. nrfx_spis_0_irq_handler
36-
*/
37-
#define SPIS_NODE(idx) \
38-
COND_CODE_1(DT_NODE_EXISTS(DT_NODELABEL(spis##idx)), (spis##idx), (spi##idx))
39-
#define SPIS(idx) DT_NODELABEL(SPIS_NODE(idx))
40-
#define SPIS_PROP(idx, prop) DT_PROP(SPIS(idx), prop)
41-
#define SPIS_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(SPIS(idx), prop)
42-
#define SPIS_IS_FAST(idx) NRF_DT_IS_FAST(SPIS(idx))
43-
44-
#define SPIS_PINS_CROSS_DOMAIN(unused, prefix, idx, _) \
45-
COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(SPIS(prefix##idx)), \
46-
(SPIS_PROP(idx, cross_domain_pins_supported)), \
47-
(0))
48-
49-
#if NRFX_FOREACH_PRESENT(SPIS, SPIS_PINS_CROSS_DOMAIN, (||), (0))
33+
#define SPIS_PINS_CROSS_DOMAIN(inst) \
34+
DT_INST_PROP(inst, cross_domain_pins_supported)
35+
36+
#define SPIS_PINS_CROSS_DOMAIN_OR(inst) SPIS_PINS_CROSS_DOMAIN(inst) ||
37+
38+
#if (DT_INST_FOREACH_STATUS_OKAY(SPIS_PINS_CROSS_DOMAIN_OR) 0)
5039
#include <hal/nrf_gpio.h>
5140
/* Certain SPIM instances support usage of cross domain pins in form of dedicated pins on
5241
* a port different from the default one.
@@ -63,6 +52,7 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED));
6352
#endif
6453

6554
struct spi_nrfx_data {
55+
nrfx_spis_t spis;
6656
struct spi_context ctx;
6757
const struct device *dev;
6858
#ifdef CONFIG_MULTITHREADING
@@ -74,7 +64,6 @@ struct spi_nrfx_data {
7464
};
7565

7666
struct spi_nrfx_config {
77-
nrfx_spis_t spis;
7867
nrfx_spis_config_t config;
7968
void (*irq_connect)(void);
8069
uint16_t max_buf_len;
@@ -142,7 +131,6 @@ static inline nrf_spis_bit_order_t get_nrf_spis_bit_order(uint16_t operation)
142131
static int configure(const struct device *dev,
143132
const struct spi_config *spi_cfg)
144133
{
145-
const struct spi_nrfx_config *dev_config = dev->config;
146134
struct spi_nrfx_data *dev_data = dev->data;
147135
struct spi_context *ctx = &dev_data->ctx;
148136

@@ -184,7 +172,7 @@ static int configure(const struct device *dev,
184172

185173
ctx->config = spi_cfg;
186174

187-
nrf_spis_configure(dev_config->spis.p_reg,
175+
nrf_spis_configure(dev_data->spis.p_reg,
188176
get_nrf_spis_mode(spi_cfg->operation),
189177
get_nrf_spis_bit_order(spi_cfg->operation));
190178

@@ -197,7 +185,6 @@ static int prepare_for_transfer(const struct device *dev,
197185
{
198186
const struct spi_nrfx_config *dev_config = dev->config;
199187
struct spi_nrfx_data *dev_data = dev->data;
200-
nrfx_err_t result;
201188
uint8_t *dmm_tx_buf;
202189
uint8_t *dmm_rx_buf;
203190
int err;
@@ -223,11 +210,10 @@ static int prepare_for_transfer(const struct device *dev,
223210
goto in_alloc_failed;
224211
}
225212

226-
result = nrfx_spis_buffers_set(&dev_config->spis,
213+
err = nrfx_spis_buffers_set(&dev_data->spis,
227214
dmm_tx_buf, tx_buf_len,
228215
dmm_rx_buf, rx_buf_len);
229-
if (result != NRFX_SUCCESS) {
230-
err = -EIO;
216+
if (err != 0) {
231217
goto buffers_set_failed;
232218
}
233219

@@ -315,7 +301,7 @@ static int transceive(const struct device *dev,
315301
if (dev_config->wake_gpio.port) {
316302
wait_for_wake(dev_data, dev_config);
317303

318-
nrf_spis_enable(dev_config->spis.p_reg);
304+
nrf_spis_enable(dev_data->spis.p_reg);
319305
}
320306

321307
error = prepare_for_transfer(dev,
@@ -345,7 +331,7 @@ static int transceive(const struct device *dev,
345331
}
346332

347333
if (dev_config->wake_gpio.port) {
348-
nrf_spis_disable(dev_config->spis.p_reg);
334+
nrf_spis_disable(dev_data->spis.p_reg);
349335
}
350336
}
351337

@@ -399,7 +385,7 @@ static DEVICE_API(spi, spi_nrfx_driver_api) = {
399385
.release = spi_nrfx_release,
400386
};
401387

402-
static void event_handler(const nrfx_spis_evt_t *p_event, void *p_context)
388+
static void event_handler(const nrfx_spis_event_t *p_event, void *p_context)
403389
{
404390
const struct device *dev = p_context;
405391
struct spi_nrfx_data *dev_data = dev->data;
@@ -427,9 +413,10 @@ static void event_handler(const nrfx_spis_evt_t *p_event, void *p_context)
427413
static void spi_nrfx_suspend(const struct device *dev)
428414
{
429415
const struct spi_nrfx_config *dev_config = dev->config;
416+
struct spi_nrfx_data *dev_data = dev->data;
430417

431418
if (dev_config->wake_gpio.port == NULL) {
432-
nrf_spis_disable(dev_config->spis.p_reg);
419+
nrf_spis_disable(dev_data->spis.p_reg);
433420
}
434421

435422
#if SPIS_CROSS_DOMAIN_SUPPORTED
@@ -452,6 +439,7 @@ static void spi_nrfx_suspend(const struct device *dev)
452439
static void spi_nrfx_resume(const struct device *dev)
453440
{
454441
const struct spi_nrfx_config *dev_config = dev->config;
442+
struct spi_nrfx_data *dev_data = dev->data;
455443

456444
(void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT);
457445

@@ -470,7 +458,7 @@ static void spi_nrfx_resume(const struct device *dev)
470458
#endif
471459

472460
if (dev_config->wake_gpio.port == NULL) {
473-
nrf_spis_enable(dev_config->spis.p_reg);
461+
nrf_spis_enable(dev_data->spis.p_reg);
474462
}
475463
}
476464

@@ -496,18 +484,17 @@ static int spi_nrfx_init(const struct device *dev)
496484
{
497485
const struct spi_nrfx_config *dev_config = dev->config;
498486
struct spi_nrfx_data *dev_data = dev->data;
499-
nrfx_err_t result;
500487
int err;
501488

502489
/* This sets only default values of mode and bit order. The ones to be
503490
* actually used are set in configure() when a transfer is prepared.
504491
*/
505-
result = nrfx_spis_init(&dev_config->spis, &dev_config->config,
492+
err = nrfx_spis_init(&dev_data->spis, &dev_config->config,
506493
event_handler, (void *)dev);
507494

508-
if (result != NRFX_SUCCESS) {
495+
if (err != 0) {
509496
LOG_ERR("Failed to initialize device: %s", dev->name);
510-
return -EBUSY;
497+
return err;
511498
}
512499

513500
/* When the WAKE line is used, the SPIS peripheral is enabled
@@ -518,7 +505,7 @@ static int spi_nrfx_init(const struct device *dev)
518505
* with the SPIS peripheral enabled, significantly reduces idle
519506
* power consumption.
520507
*/
521-
nrf_spis_disable(dev_config->spis.p_reg);
508+
nrf_spis_disable(dev_data->spis.p_reg);
522509

523510
if (dev_config->wake_gpio.port) {
524511
if (!gpio_is_ready_dt(&dev_config->wake_gpio)) {
@@ -560,82 +547,77 @@ static int spi_nrfx_init(const struct device *dev)
560547
*
561548
* Additionally, fast SPIS devices are not ISR safe.
562549
*/
563-
#define SPIS_PM_ISR_SAFE(idx) \
550+
#define SPIS_PM_ISR_SAFE(inst) \
564551
COND_CODE_1( \
565552
UTIL_AND( \
566553
IS_ENABLED(CONFIG_PM_DEVICE_POWER_DOMAIN), \
567554
UTIL_AND( \
568-
DT_NODE_HAS_PROP(SPIS(idx), power_domains), \
569-
DT_NODE_HAS_STATUS_OKAY(DT_PHANDLE(SPIS(idx), power_domains)) \
555+
DT_INST_NODE_HAS_PROP(inst, power_domains), \
556+
DT_NODE_HAS_STATUS_OKAY(DT_INST_PHANDLE(inst, power_domains)) \
570557
) \
571558
), \
572559
(0), \
573560
(COND_CODE_1( \
574-
SPIS_IS_FAST(idx), \
561+
NRF_DT_INST_IS_FAST(inst), \
575562
(0), \
576563
(PM_DEVICE_ISR_SAFE) \
577564
)) \
578565
)
579566

580-
#define SPI_NRFX_SPIS_DEFINE(idx) \
581-
NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SPIS(idx)); \
582-
static void irq_connect##idx(void) \
583-
{ \
584-
IRQ_CONNECT(DT_IRQN(SPIS(idx)), DT_IRQ(SPIS(idx), priority), \
585-
nrfx_isr, nrfx_spis_##idx##_irq_handler, 0); \
586-
} \
587-
static struct spi_nrfx_data spi_##idx##_data = { \
567+
#define SPI_NRFX_SPIS_DEFINE(inst) \
568+
NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \
569+
static struct spi_nrfx_data spi_##inst##_data = { \
570+
.spis = NRFX_SPIS_INSTANCE(DT_INST_REG_ADDR(inst)), \
588571
IF_ENABLED(CONFIG_MULTITHREADING, \
589-
(SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),)) \
572+
(SPI_CONTEXT_INIT_LOCK(spi_##inst##_data, ctx),)) \
590573
IF_ENABLED(CONFIG_MULTITHREADING, \
591-
(SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx),)) \
592-
.dev = DEVICE_DT_GET(SPIS(idx)), \
574+
(SPI_CONTEXT_INIT_SYNC(spi_##inst##_data, ctx),)) \
575+
.dev = DEVICE_DT_GET(DT_DRV_INST(inst)), \
593576
IF_ENABLED(CONFIG_MULTITHREADING, \
594577
(.wake_sem = Z_SEM_INITIALIZER( \
595-
spi_##idx##_data.wake_sem, 0, 1),)) \
578+
spi_##inst##_data.wake_sem, 0, 1),)) \
596579
}; \
597-
PINCTRL_DT_DEFINE(SPIS(idx)); \
598-
static const struct spi_nrfx_config spi_##idx##z_config = { \
599-
.spis = { \
600-
.p_reg = (NRF_SPIS_Type *)DT_REG_ADDR(SPIS(idx)), \
601-
.drv_inst_idx = NRFX_SPIS##idx##_INST_IDX, \
602-
}, \
580+
static void irq_connect##inst(void) \
581+
{ \
582+
IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \
583+
nrfx_spis_irq_handler, &spi_##inst##_data.spis, 0); \
584+
} \
585+
PINCTRL_DT_INST_DEFINE(inst); \
586+
static const struct spi_nrfx_config spi_##inst##z_config = { \
603587
.config = { \
604588
.skip_gpio_cfg = true, \
605589
.skip_psel_cfg = true, \
606590
.mode = NRF_SPIS_MODE_0, \
607591
.bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
608-
.orc = SPIS_PROP(idx, overrun_character), \
609-
.def = SPIS_PROP(idx, def_char), \
592+
.orc = DT_INST_PROP(inst, overrun_character), \
593+
.def = DT_INST_PROP(inst, def_char), \
610594
}, \
611-
.irq_connect = irq_connect##idx, \
612-
.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIS(idx)), \
613-
.max_buf_len = BIT_MASK(SPIS_PROP(idx, easydma_maxcnt_bits)), \
614-
.wake_gpio = GPIO_DT_SPEC_GET_OR(SPIS(idx), wake_gpios, {0}), \
615-
.mem_reg = DMM_DEV_TO_REG(SPIS(idx)), \
616-
IF_ENABLED(SPIS_PINS_CROSS_DOMAIN(_, /*empty*/, idx, _), \
595+
.irq_connect = irq_connect##inst, \
596+
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
597+
.max_buf_len = BIT_MASK(DT_INST_PROP(inst, \
598+
easydma_maxcnt_bits)), \
599+
.wake_gpio = GPIO_DT_SPEC_GET_OR(DT_DRV_INST(inst), \
600+
wake_gpios, {0}), \
601+
.mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst)), \
602+
IF_ENABLED(SPIS_PINS_CROSS_DOMAIN(inst), \
617603
(.cross_domain = true, \
618604
.default_port = \
619-
DT_PROP_OR(DT_PHANDLE(SPIS(idx), \
605+
DT_PROP_OR(DT_INST_PHANDLE(inst, \
620606
default_gpio_port), port, -1),)) \
621607
}; \
622-
BUILD_ASSERT(!DT_NODE_HAS_PROP(SPIS(idx), wake_gpios) || \
623-
!(DT_GPIO_FLAGS(SPIS(idx), wake_gpios) & GPIO_ACTIVE_LOW),\
608+
BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, wake_gpios) || \
609+
!(DT_GPIO_FLAGS(DT_DRV_INST(inst), wake_gpios) & \
610+
GPIO_ACTIVE_LOW), \
624611
"WAKE line must be configured as active high"); \
625-
PM_DEVICE_DT_DEFINE(SPIS(idx), spi_nrfx_pm_action, \
626-
SPIS_PM_ISR_SAFE(idx)); \
627-
SPI_DEVICE_DT_DEFINE(SPIS(idx), \
628-
spi_nrfx_init, \
629-
PM_DEVICE_DT_GET(SPIS(idx)), \
630-
&spi_##idx##_data, \
631-
&spi_##idx##z_config, \
632-
POST_KERNEL, \
633-
CONFIG_SPI_INIT_PRIORITY, \
634-
&spi_nrfx_driver_api)
635-
636-
/* Macro creates device instance if it is enabled in devicetree. */
637-
#define SPIS_DEVICE(periph, prefix, id, _) \
638-
IF_ENABLED(CONFIG_HAS_HW_NRF_SPIS##prefix##id, (SPI_NRFX_SPIS_DEFINE(prefix##id);))
639-
640-
/* Macro iterates over nrfx_spis instances enabled in the nrfx_config.h. */
641-
NRFX_FOREACH_ENABLED(SPIS, SPIS_DEVICE, (), (), _)
612+
PM_DEVICE_DT_INST_DEFINE(inst, spi_nrfx_pm_action, \
613+
SPIS_PM_ISR_SAFE(inst)); \
614+
SPI_DEVICE_DT_INST_DEFINE(inst, \
615+
spi_nrfx_init, \
616+
PM_DEVICE_DT_INST_GET(inst), \
617+
&spi_##inst##_data, \
618+
&spi_##inst##z_config, \
619+
POST_KERNEL, \
620+
CONFIG_SPI_INIT_PRIORITY, \
621+
&spi_nrfx_driver_api)
622+
623+
DT_INST_FOREACH_STATUS_OKAY(SPI_NRFX_SPIS_DEFINE)

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