Skip to content

Commit 9f5f90d

Browse files
emilazyemilazy
committed
mediatek: apsoc: move plat_is_my_cpu_primary into assembly helpers
This function is called before the C stack is set up, which resulted in hangs when TF‐A is compiled with `-fno-omit-frame-pointer`, as is now the default on several major Linux distributions. As a slightly broken non‐stub implementation was already available for the equivalent obsolete `platform_is_primary_cpu` API, fix and rename it and drop the C functions. If this logic is truly unnecessary, then `COLD_BOOT_SINGLE_CPU` could be set instead and these functions removed. Fixes: 6ea8b64 ("mediatek: mt7622: add initial BL2/BL31 support") Fixes: 36bebd6 ("mediatek: mt7986: add initial BL2/BL31 support") Fixes: fd8aeca ("mediatek: mt7981: add initial BL2/BL31 support") Fixes: ced5322 ("mediatek: mt7988: add initial BL2/BL31 support") Fixes: e838b23 ("mediatek: mt7987: add initial BL2/BL31 support") Signed-off-by: Emily <hello@emily.moe>
1 parent 744021c commit 9f5f90d

File tree

10 files changed

+21
-41
lines changed

10 files changed

+21
-41
lines changed

‎plat/mediatek/mt7622/aarch64/plat_helpers.S‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
.globl platform_mem_init
1212
.globl plat_secondary_cold_boot_setup
1313
.globl plat_report_exception
14-
.globl platform_is_primary_cpu
14+
.globl plat_is_my_cpu_primary
1515
.globl plat_my_core_pos
1616
.globl plat_crash_console_init
1717
.globl plat_crash_console_putc
@@ -55,12 +55,13 @@ func write_cpuectlr
5555
ret
5656
endfunc write_cpuectlr
5757

58-
func platform_is_primary_cpu
58+
func plat_is_my_cpu_primary
59+
mrs x0, mpidr_el1
5960
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
6061
cmp x0, #MT7622_PRIMARY_CPU
6162
cset x0, eq
6263
ret
63-
endfunc platform_is_primary_cpu
64+
endfunc plat_is_my_cpu_primary
6465

6566
/* -----------------------------------------------------
6667
* unsigned int plat_my_core_pos(void);
@@ -114,4 +115,4 @@ endfunc plat_crash_console_putc
114115
func plat_crash_console_flush
115116
mov_imm x0, UART_BASE
116117
b console_hsuart_core_flush
117-
endfunc plat_crash_console_flush
118+
endfunc plat_crash_console_flush

‎plat/mediatek/mt7622/bl2/bl2_plat_init.c‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -31,11 +31,6 @@ void bl2_el3_plat_arch_setup(void)
3131
{
3232
}
3333

34-
bool plat_is_my_cpu_primary(void)
35-
{
36-
return true;
37-
}
38-
3934
const struct initcall bl2_initcalls[] = {
4035
INITCALL(plat_mt_cpuxgpt_init),
4136
INITCALL(generic_delay_timer_init),

‎plat/mediatek/mt7981/aarch64/plat_helpers.S‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
.globl platform_mem_init
1212
.globl plat_secondary_cold_boot_setup
1313
.globl plat_report_exception
14-
.globl platform_is_primary_cpu
14+
.globl plat_is_my_cpu_primary
1515
.globl plat_my_core_pos
1616
.globl plat_crash_console_init
1717
.globl plat_crash_console_putc
@@ -55,12 +55,13 @@ func write_cpuectlr
5555
ret
5656
endfunc write_cpuectlr
5757

58-
func platform_is_primary_cpu
58+
func plat_is_my_cpu_primary
59+
mrs x0, mpidr_el1
5960
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
6061
cmp x0, #PRIMARY_CPU
6162
cset x0, eq
6263
ret
63-
endfunc platform_is_primary_cpu
64+
endfunc plat_is_my_cpu_primary
6465

6566
/* -----------------------------------------------------
6667
* unsigned int plat_my_core_pos(void);

‎plat/mediatek/mt7981/bl2/bl2_plat_init.c‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -59,11 +59,6 @@ void bl2_el3_plat_arch_setup(void)
5959
{
6060
}
6161

62-
bool plat_is_my_cpu_primary(void)
63-
{
64-
return true;
65-
}
66-
6762
const struct initcall bl2_initcalls[] = {
6863
INITCALL(mtk_timer_init),
6964
INITCALL(generic_delay_timer_init),

‎plat/mediatek/mt7986/aarch64/plat_helpers.S‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
.globl platform_mem_init
1212
.globl plat_secondary_cold_boot_setup
1313
.globl plat_report_exception
14-
.globl platform_is_primary_cpu
14+
.globl plat_is_my_cpu_primary
1515
.globl plat_my_core_pos
1616
.globl plat_crash_console_init
1717
.globl plat_crash_console_putc
@@ -55,12 +55,13 @@ func write_cpuectlr
5555
ret
5656
endfunc write_cpuectlr
5757

58-
func platform_is_primary_cpu
58+
func plat_is_my_cpu_primary
59+
mrs x0, mpidr_el1
5960
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
6061
cmp x0, #PRIMARY_CPU
6162
cset x0, eq
6263
ret
63-
endfunc platform_is_primary_cpu
64+
endfunc plat_is_my_cpu_primary
6465

6566
/* -----------------------------------------------------
6667
* unsigned int plat_my_core_pos(void);

‎plat/mediatek/mt7986/bl2/bl2_plat_init.c‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -83,11 +83,6 @@ void bl2_el3_plat_arch_setup(void)
8383
{
8484
}
8585

86-
bool plat_is_my_cpu_primary(void)
87-
{
88-
return true;
89-
}
90-
9186
const struct initcall bl2_initcalls[] = {
9287
INITCALL(mtk_timer_init),
9388
INITCALL(generic_delay_timer_init),

‎plat/mediatek/mt7987/aarch64/plat_helpers.S‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
.globl platform_mem_init
1212
.globl plat_secondary_cold_boot_setup
1313
.globl plat_report_exception
14-
.globl platform_is_primary_cpu
14+
.globl plat_is_my_cpu_primary
1515
.globl plat_my_core_pos
1616
.globl plat_crash_console_init
1717
.globl plat_crash_console_putc
@@ -54,12 +54,13 @@ func write_cpuectlr
5454
ret
5555
endfunc write_cpuectlr
5656

57-
func platform_is_primary_cpu
57+
func plat_is_my_cpu_primary
58+
mrs x0, mpidr_el1
5859
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
5960
cmp x0, #PRIMARY_CPU
6061
cset x0, eq
6162
ret
62-
endfunc platform_is_primary_cpu
63+
endfunc plat_is_my_cpu_primary
6364

6465
/* -----------------------------------------------------
6566
* unsigned int plat_my_core_pos(void);

‎plat/mediatek/mt7987/bl2/bl2_plat_init.c‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -188,11 +188,6 @@ void bl2_el3_plat_arch_setup(void)
188188
generic_delay_timer_init();
189189
}
190190

191-
bool plat_is_my_cpu_primary(void)
192-
{
193-
return true;
194-
}
195-
196191
const struct initcall bl2_initcalls[] = {
197192
INITCALL(mtk_wdt_init),
198193
INITCALL(mtk_disable_PGD),

‎plat/mediatek/mt7988/aarch64/plat_helpers.S‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
.globl platform_mem_init
1212
.globl plat_secondary_cold_boot_setup
1313
.globl plat_report_exception
14-
.globl platform_is_primary_cpu
14+
.globl plat_is_my_cpu_primary
1515
.globl plat_my_core_pos
1616
.globl plat_crash_console_init
1717
.globl plat_crash_console_putc
@@ -54,12 +54,13 @@ func write_cpuectlr
5454
ret
5555
endfunc write_cpuectlr
5656

57-
func platform_is_primary_cpu
57+
func plat_is_my_cpu_primary
58+
mrs x0, mpidr_el1
5859
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
5960
cmp x0, #PRIMARY_CPU
6061
cset x0, eq
6162
ret
62-
endfunc platform_is_primary_cpu
63+
endfunc plat_is_my_cpu_primary
6364

6465
/* -----------------------------------------------------
6566
* unsigned int plat_my_core_pos(void);

‎plat/mediatek/mt7988/bl2/bl2_plat_init.c‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -174,11 +174,6 @@ void bl2_el3_plat_arch_setup(void)
174174
generic_delay_timer_init();
175175
}
176176

177-
bool plat_is_my_cpu_primary(void)
178-
{
179-
return true;
180-
}
181-
182177
const struct initcall bl2_initcalls[] = {
183178
INITCALL(mtk_wdt_init),
184179
INITCALL(mtk_disable_PGD),

0 commit comments

Comments
 (0)