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Update nvapi from R555 to R570
1 parent 003b001 commit 0bb9d5f

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+4350
-1188
lines changed

vendor/nvapi/NvApiDriverSettings.c

Lines changed: 176 additions & 39 deletions
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vendor/nvapi/NvApiDriverSettings.h

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vendor/nvapi/amd64/nvapi64.lib

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vendor/nvapi/nvHLSLExtns.h

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vendor/nvapi/nvHLSLExtnsInternal.h

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@@ -1,37 +1,28 @@
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/************************************************************************************************************************************\
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|* *|
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|* Copyright © 2012 NVIDIA Corporation. All rights reserved. *|
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|* *|
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|* NOTICE TO USER: *|
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|* *|
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|* This software is subject to NVIDIA ownership rights under U.S. and international Copyright laws. *|
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|* *|
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|* This software and the information contained herein are PROPRIETARY and CONFIDENTIAL to NVIDIA *|
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|* and are being provided solely under the terms and conditions of an NVIDIA software license agreement. *|
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|* Otherwise, you have no rights to use or access this software in any manner. *|
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|* *|
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|* If not covered by the applicable NVIDIA software license agreement: *|
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|* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOFTWARE FOR ANY PURPOSE. *|
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|* IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. *|
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|* NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, *|
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|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. *|
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|* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, *|
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|* OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, *|
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|* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
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|* *|
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|* U.S. Government End Users. *|
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|* This software is a "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
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|* consisting of "commercial computer software" and "commercial computer software documentation" *|
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|* as such terms are used in 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government only as a commercial end item. *|
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|* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
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|* all U.S. Government End Users acquire the software with only those rights set forth herein. *|
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|* *|
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|* Any use of this software in individual and commercial software must include, *|
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|* in the user documentation and internal comments to the code, *|
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|* the above Disclaimer (as applicable) and U.S. Government End Users Notice. *|
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|* *|
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\************************************************************************************************************************************/
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/*********************************************************************************************************\
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|* *|
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|* SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. *|
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|* SPDX-License-Identifier: MIT *|
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|* *|
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|* Permission is hereby granted, free of charge, to any person obtaining a *|
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|* copy of this software and associated documentation files (the "Software"), *|
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|* to deal in the Software without restriction, including without limitation *|
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|* the rights to use, copy, modify, merge, publish, distribute, sublicense, *|
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|* and/or sell copies of the Software, and to permit persons to whom the *|
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|* Software is furnished to do so, subject to the following conditions: *|
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|* *|
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|* The above copyright notice and this permission notice shall be included in *|
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|* all copies or substantial portions of the Software. *|
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|* *|
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|* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR *|
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|* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, *|
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|* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL *|
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|* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER *|
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|* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING *|
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|* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER *|
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|* DEALINGS IN THE SOFTWARE. *|
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|* *|
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|* *|
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\*********************************************************************************************************/
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////////////////////////// NVIDIA SHADER EXTENSIONS /////////////////
3627
// internal functions
3728
// Functions in this file are not expected to be called by apps directly
@@ -764,4 +755,201 @@ int __NvShflGeneric(int val, uint srcLane, uint maskClampVal, out uint laneValid
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765756
laneValid = asuint(g_NvidiaExt.IncrementCounter());
766757
return g_NvidiaExt.IncrementCounter();
767-
}
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}
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//----------------------------------------------------------------------------//
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// DXR RayQuery functions
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#if __SHADER_TARGET_MAJOR > 6 || (__SHADER_TARGET_MAJOR == 6 && __SHADER_TARGET_MINOR >= 5)
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uint __NvRtGetCandidateClusterID(uint rqFlags)
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{
768+
uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_GET_CANDIDATE_CLUSTER_ID;
770+
g_NvidiaExt[index].src0u.x = rqFlags;
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return g_NvidiaExt.IncrementCounter();
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}
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uint __NvRtGetCommittedClusterID(uint rqFlags)
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{
776+
uint index = g_NvidiaExt.IncrementCounter();
777+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_GET_COMMITTED_CLUSTER_ID;
778+
g_NvidiaExt[index].src0u.x = rqFlags;
779+
return g_NvidiaExt.IncrementCounter();
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}
781+
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float3x3 __NvRtCandidateTriangleObjectPositions(uint rqFlags)
783+
{
784+
uint index = g_NvidiaExt.IncrementCounter();
785+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_TRIANGLE_OBJECT_POSITIONS;
786+
g_NvidiaExt[index].src0u.x = rqFlags;
787+
788+
float3x3 ret;
789+
ret[0][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2][2] = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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float3x3 __NvRtCommittedTriangleObjectPositions(uint rqFlags)
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{
803+
uint index = g_NvidiaExt.IncrementCounter();
804+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMITTED_TRIANGLE_OBJECT_POSITIONS;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float3x3 ret;
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ret[0][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2][2] = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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bool __NvRtCandidateIsNonOpaqueSphere(uint rqFlags)
821+
{
822+
uint index = g_NvidiaExt.IncrementCounter();
823+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_IS_NONOPAQUE_SPHERE;
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g_NvidiaExt[index].src0u.x = rqFlags;
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uint ret = g_NvidiaExt.IncrementCounter();
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return ret != 0;
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}
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829+
bool __NvRtCandidateIsNonOpaqueLss(uint rqFlags)
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{
831+
uint index = g_NvidiaExt.IncrementCounter();
832+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_IS_NONOPAQUE_LSS;
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g_NvidiaExt[index].src0u.x = rqFlags;
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uint ret = g_NvidiaExt.IncrementCounter();
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return ret != 0;
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}
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float __NvRtCandidateLssHitParameter(uint rqFlags)
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{
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uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_LSS_HIT_PARAMETER;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float ret = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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float4 __NvRtCandidateSphereObjectPositionAndRadius(uint rqFlags)
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{
849+
uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_SPHERE_OBJECT_POSITION_AND_RADIUS;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float4 ret;
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ret[0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[3] = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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float2x4 __NvRtCandidateLssObjectPositionsAndRadii(uint rqFlags)
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{
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uint index = g_NvidiaExt.IncrementCounter();
864+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_LSS_OBJECT_POSITIONS_AND_RADII;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float2x4 ret;
868+
ret[0][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][3] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][3] = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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float __NvRtCandidateBuiltinPrimitiveRayT(uint rqFlags)
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{
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uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_CANDIDATE_BUILTIN_PRIMITIVE_RAY_T;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float ret = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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bool __NvRtCommittedIsSphere(uint rqFlags)
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{
890+
uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMITTED_IS_SPHERE;
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g_NvidiaExt[index].src0u.x = rqFlags;
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uint ret = g_NvidiaExt.IncrementCounter();
894+
return ret != 0;
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}
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bool __NvRtCommittedIsLss(uint rqFlags)
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{
899+
uint index = g_NvidiaExt.IncrementCounter();
900+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMITTED_IS_LSS;
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g_NvidiaExt[index].src0u.x = rqFlags;
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uint ret = g_NvidiaExt.IncrementCounter();
903+
return ret != 0;
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}
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float __NvRtCommittedLssHitParameter(uint rqFlags)
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{
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uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMITTED_LSS_HIT_PARAMETER;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float ret = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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float4 __NvRtCommittedSphereObjectPositionAndRadius(uint rqFlags)
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{
917+
uint index = g_NvidiaExt.IncrementCounter();
918+
g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMITTED_SPHERE_OBJECT_POSITION_AND_RADIUS;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float4 ret;
922+
ret[0] = asfloat(g_NvidiaExt.IncrementCounter());
923+
ret[1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[3] = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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float2x4 __NvRtCommittedLssObjectPositionsAndRadii(uint rqFlags)
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{
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uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMITTED_LSS_OBJECT_POSITIONS_AND_RADII;
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g_NvidiaExt[index].src0u.x = rqFlags;
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float2x4 ret;
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ret[0][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[0][3] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][0] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][1] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][2] = asfloat(g_NvidiaExt.IncrementCounter());
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ret[1][3] = asfloat(g_NvidiaExt.IncrementCounter());
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return ret;
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}
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void __NvRtCommitNonOpaqueBuiltinPrimitiveHit(uint rqFlags)
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{
949+
uint index = g_NvidiaExt.IncrementCounter();
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g_NvidiaExt[index].opcode = NV_EXTN_OP_RT_COMMIT_NONOPAQUE_BUILTIN_PRIMITIVE_HIT;
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g_NvidiaExt[index].src0u.x = rqFlags;
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uint handle = g_NvidiaExt.IncrementCounter();
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}
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#endif

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