Skip to content

Commit 9081509

Browse files
got compiling again, although with warnings.
1 parent a956678 commit 9081509

File tree

2 files changed

+22
-22
lines changed

2 files changed

+22
-22
lines changed

mythril/src/emulate/cpuid.rs

Lines changed: 21 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,8 @@
1-
use crate::apic::get_local_apic;
21
use crate::error::Result;
32
use crate::vcpu::VCpu;
43
use crate::{vcpu, vmexit};
54
use arrayvec::ArrayVec;
65
use bitfield::bitfield;
7-
use bitflags::_core::num::flt2dec::to_shortest_exp_str;
86
use core::convert::TryInto;
97
use raw_cpuid::CpuIdResult;
108

@@ -26,17 +24,18 @@ const MAX_CPUID_INPUT: u32 = 0x80000008;
2624
//todo //CPUID leaves above 2 and below 80000000H are visible only when
2725
// // IA32_MISC_ENABLE[bit 22] has its default value of 0.
2826

27+
const NAME_CREATION_ERROR_MESSAGE: &'static str =
28+
"Somehow bytes was not actually a 12 element array";
29+
2930
fn get_cpu_id_result(
3031
vcpu: &vcpu::VCpu,
3132
eax_in: u32,
3233
ecx_in: u32,
3334
) -> CpuIdResult {
34-
const NAME_CREATION_ERROR_MESSAGE: &'static str =
35-
"Somehow bytes was not actually a 12 element array";
3635

3736
let mut actual = raw_cpuid::native_cpuid::cpuid_count(
38-
guest_cpu.rax as u32,
39-
guest_cpu.rcx as u32,
37+
eax_in,
38+
ecx_in,
4039
);
4140

4241
match eax_in {
@@ -78,7 +77,7 @@ fn get_cpu_id_result(
7877
}
7978
}
8079
CPUID_BRAND_STRING_1..=CPUID_BRAND_STRING_3 => {
81-
if vcpu.vm.read().config.override_cpu_name() { todo!("CPU Brand string not implemented yet") }
80+
if vcpu.vm.config.override_cpu_name() { todo!("CPU Brand string not implemented yet") }
8281
actual
8382
}
8483
_ => {
@@ -92,12 +91,12 @@ fn get_cpu_id_result(
9291
bitfield! {
9392
pub struct IntelCoreCacheTopologyEaxRes(u32);
9493
impl Debug;
95-
cache_type,_:4,0;
96-
cache_level,_:7,5;
97-
self_init_cache_level,_:8;
98-
fully_associative,_:9;
99-
max_addressable_ids_logical,_:14,25;
100-
max_addressable_ids_physical,_:26,31;
94+
cache_type,set_cache_type:4,0;
95+
cache_level,set_cache_level:7,5;
96+
self_init_cache_level,set_self_init_cache_level:8;
97+
fully_associative,set_fully_associative:9;
98+
max_addressable_ids_logical,set_max_addressable_ids_logical:14,25;
99+
max_addressable_ids_physical,set_max_addressable_ids_physical:26,31;
101100
}
102101

103102
fn intel_cache_topo(mut actual: CpuIdResult) -> CpuIdResult {
@@ -130,23 +129,23 @@ bitfield! {
130129
impl Debug;
131130
brand_idx, _: 7,0;
132131
cflush,_:15,8;
133-
max_processor_ids,_:23,16;
134-
apic_id,_:31,24;
132+
max_processor_ids,set_max_processor_ids:23,16;
133+
apic_id, set_apic_id:31,24;
135134
}
136135

137136
bitfield! {
138137
pub struct FeatureInformationECX(u32);
139138
impl Debug;
140139
//there are a lot of features here, so only add the ones we care about for now.
141-
xsave, _: 26;
142-
hypervissor, _: 31;
140+
xsave, set_xsave: 26;
141+
hypervisor, set_hypervisor: 31;
143142
}
144143

145144
bitfield! {
146145
pub struct FeatureInformationEDX(u32);
147146
impl Debug;
148147
//there are a lot of features here, so only add the ones we care about for now.
149-
mtrr, _: 12;
148+
mtrr, set_mtrr: 12;
150149
}
151150

152151
fn cpuid_model_family_stepping(actual: CpuIdResult) -> CpuIdResult {
@@ -164,21 +163,21 @@ fn cpuid_model_family_stepping(actual: CpuIdResult) -> CpuIdResult {
164163
// I would have made type safe bindings for this but then I saw how many fields there where...
165164

166165
// Disable MTRR
167-
features_edx.set_mtrr(0);
166+
features_edx.set_mtrr(false);
168167

169168
// Disable XSAVE
170169
// ecx &= !(1 << 26);
171-
features_ecx.set_xsave(0);
170+
features_ecx.set_xsave(false);
172171

173172
// Hide hypervisor feature
174-
features_ecx.set_hypervisor(0);
173+
features_ecx.set_hypervisor(false);
175174
let ecx = features_ecx.0;
176175
let edx = features_edx.0;
177176
CpuIdResult { eax, ebx, ecx, edx }
178177
}
179178

180179
fn cpuid_name(vcpu: &VCpu, actual: CpuIdResult) -> CpuIdResult {
181-
if vcpu.vm.read().config.override_cpu_name() {
180+
if vcpu.vm.config.override_cpu_name() {
182181
let cpu_name = "MythrilCPU__";
183182
let bytes = cpu_name
184183
.chars()

mythril/src/vcpu.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -125,6 +125,7 @@ impl VCpu {
125125
local_apic: virtdev::lapic::LocalApic::new(),
126126
stack: get_per_core_mut!(HOST_STACK),
127127
pending_interrupts: BTreeMap::new(),
128+
vcpu_apic_id: todo!()
128129
};
129130

130131
unsafe {

0 commit comments

Comments
 (0)