refactored cpuid_model_family_stepping

Author: francis-starlab

mythril/src/emulate/cpuid.rs

@@ -6,6 +6,7 @@ use core::convert::TryInto;
 use bitfield::bitfield;
 use bitflags::_core::num::flt2dec::to_shortest_exp_str;
 use crate::apic::get_local_apic;
+use crate::vcpu::VCpu;
 
 //Used https://c9x.me/x86/html/file_module_x86_id_45.html as guid for implementing this.
 const CPUID_NAME: u32 = 0;
@@ -28,25 +29,7 @@ const MAX_CPUID_INPUT: u32 = 0x80000004;
 //
 // }
 
-bitfield! {
-    pub struct IntelTypeFamilyModelSteppingIDEaxRes(u32);
-    impl Debug;
-    stepping_id, _: 3,0;
-    model,_:7,4;
-    family_id,_:11,8;
-    processor_type,_:13,12;
-    extended_model_id,_:19,16;
-    extended_family_id,_:27,20;
-}
 
-bitfield! {
-    pub struct BrandCFlushMaxIDsInitialAPIC(u32);
-    impl Debug;
-    brand_idx, _: 7,0;
-    cflush,_:15,8;
-    max_processor_ids,_:23,16;
-    apic_id,_:31,24;
-}
 
 
 fn get_cpu_id_result(vcpu: &vcpu::VCpu, eax_in: u32, ecx_in: u32) -> CpuIdResult {
@@ -59,33 +42,8 @@ fn get_cpu_id_result(vcpu: &vcpu::VCpu, eax_in: u32, ecx_in: u32) -> CpuIdResult
     );
 
     match eax_in {
-        CPUID_NAME => cpuid_name(vcpu, &mut actual),
-        CPUID_MODEL_FAMILY_STEPPING => {
-            let family_model_stepping = IntelTypeFamilyModelSteppingIDEaxRes(actual.eax);
-            //we can change family_model_stepping, but for now just use actual.
-            let eax = family_model_stepping.0;
-            let mut brand_cflush_max_initial = BrandCFlushMaxIDsInitialAPIC(actual.ebx);
-            brand_cflush_max_initial.set_apic_id(get_local_apic().id());//in principle this is redundant
-            let ebx = brand_cflush_max_initial.0;
-            let mut ecx = actual.ecx;
-            let mut edx = actual.edx;
-            // I would have made type safe bindings for this but then I saw how many fields there where...
-
-            // Disable MTRR
-            edx &= !(1 << 12);
-
-            // Disable XSAVE
-            ecx &= !(1 << 26);
-
-            // Hide hypervisor feature
-            ecx &= !(1 << 31);
-            CpuIdResult{
-                eax,
-                ebx,
-                ecx,
-                edx
-            }
-        }
+        CPUID_NAME => cpuid_name(vcpu, actual),
+        CPUID_MODEL_FAMILY_STEPPING => cpuid_model_family_stepping(actual)
         INTEL_CORE_CACHE_TOPOLOGY => {
             let core_cpus = vcpu.vm.read().config.cpus();
 
@@ -103,7 +61,71 @@ fn get_cpu_id_result(vcpu: &vcpu::VCpu, eax_in: u32, ecx_in: u32) -> CpuIdResult
     }
 }
 
-fn cpuid_name(vcpu: &VCpu, actual: &mut CpuIdResult) -> CpuIdResult {
+bitfield! {
+    pub struct IntelTypeFamilyModelSteppingIDEaxRes(u32);
+    impl Debug;
+    stepping_id, _: 3,0;
+    model,_:7,4;
+    family_id,_:11,8;
+    processor_type,_:13,12;
+    extended_model_id,_:19,16;
+    extended_family_id,_:27,20;
+}
+
+bitfield! {
+    pub struct BrandCFlushMaxIDsInitialAPIC(u32);
+    impl Debug;
+    brand_idx, _: 7,0;
+    cflush,_:15,8;
+    max_processor_ids,_:23,16;
+    apic_id,_:31,24;
+}
+
+bitfield! {
+    pub struct FeatureInformationECX(u32);
+    //there are a lot of features here, so only add the ones we care about for now.
+    xsave, _: 27,26;
+    hypervissor, _: 32,31;
+}
+
+bitfield! {
+    pub struct FeatureInformationEDX(u32);
+    //there are a lot of features here, so only add the ones we care about for now.
+    mtrr, _: 13,12;
+}
+
+fn cpuid_model_family_stepping(actual: CpuIdResult) -> CpuIdResult {
+    let family_model_stepping = IntelTypeFamilyModelSteppingIDEaxRes(actual.eax);
+    //we can change family_model_stepping, but for now just use actual.
+    let eax = family_model_stepping.0;
+    let mut brand_cflush_max_initial = BrandCFlushMaxIDsInitialAPIC(actual.ebx);
+    brand_cflush_max_initial.set_apic_id(todo!("Waiting on virtual APICs"));
+    brand_cflush_max_initial.set_max_processor_ids(todo!("Waiting on virtual APICs"));
+    let ebx = brand_cflush_max_initial.0;
+    let mut features_ecx = FeatureInformationECX(actual.ecx);
+    let mut features_edx = FeatureInformationEDX(actual.edx);
+    // I would have made type safe bindings for this but then I saw how many fields there where...
+
+    // Disable MTRR
+    features_edx.set_mtrr(0);
+
+    // Disable XSAVE
+    // ecx &= !(1 << 26);
+    features_ecx.set_xsave(0);
+
+    // Hide hypervisor feature
+    features_ecx.set_hypervisor(0);
+    let ecx = features_ecx.0;
+    let edx = features_edx.0;
+    CpuIdResult {
+        eax,
+        ebx,
+        ecx,
+        edx
+    }
+}
+
+fn cpuid_name(vcpu: &VCpu, actual: CpuIdResult) -> CpuIdResult {
     if vcpu.vm.read().config.override_cpu_name() {
         let cpu_name = "MythrilCPU__";
         let bytes = cpu_name.chars().map(|char| char as u8).collect::<ArrayVec<[u8; 12]>>();
@@ -132,14 +154,11 @@ pub fn emulate_cpuid(
     //todo move this into get_cpu_id_result
     if guest_cpu.rax as u32 == 1 {
 
-<<<<<<< HEAD
         // Hide hypervisor feature
         res.ecx &= !(1 << 31);
 
         // Hide TSC deadline timer
         res.ecx &= !(1 << 24);
-=======
->>>>>>> handle CPUID_MODEL_FAMILY_STEPPING
     }
 
     guest_cpu.rax = res.eax as u64 | (guest_cpu.rax & 0xffffffff00000000);

mythril/src/vcpu.rs

@@ -94,7 +94,7 @@ pub struct VCpu {
     pub local_apic: virtdev::lapic::LocalApic,
     pending_interrupts: BTreeMap<u8, InjectedInterruptType>,
     stack: Vec<u8>,
-    vcpu_apic
+    vcpu_apic_id: usize
 }
 
 impl VCpu {