From f0b9c81bc86abde264448c19e289940df956db06 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Fri, 3 Apr 2026 22:27:14 +0000 Subject: [PATCH 1/5] refactor: wrap nRF24L01.h defines in nRF24L01 namespace Agent-Logs-Url: https://github.com/nRF24/RF24/sessions/7ca3a7e2-a935-43a4-a67e-446bff9a6255 Co-authored-by: 2bndy5 <14963867+2bndy5@users.noreply.github.com> --- RF24.cpp | 2 + RF24.h | 10 +-- nRF24L01.h | 195 ++++++++++++++++++++++++++++------------------------- 3 files changed, 110 insertions(+), 97 deletions(-) diff --git a/RF24.cpp b/RF24.cpp index 1cd4f791b..b8a5f7899 100644 --- a/RF24.cpp +++ b/RF24.cpp @@ -10,6 +10,8 @@ #include "RF24_config.h" #include "RF24.h" +using namespace nRF24L01; + /****************************************************************************/ void RF24::csn(bool mode) diff --git a/RF24.h b/RF24.h index c722ca1d4..4f77f0d9d 100644 --- a/RF24.h +++ b/RF24.h @@ -16,6 +16,7 @@ #define RF24_H_ #include "RF24_config.h" +#include "nRF24L01.h" #if defined(RF24_LINUX) || defined(LITTLEWIRE) #include "utility/includes.h" @@ -139,17 +140,16 @@ typedef enum */ typedef enum { -#include "nRF24L01.h" /// An alias of `0` to describe no IRQ events enabled. RF24_IRQ_NONE = 0, /// Represents an event where TX Data Failed to send. - RF24_TX_DF = 1 << MASK_MAX_RT, + RF24_TX_DF = 1 << nRF24L01::MASK_MAX_RT, /// Represents an event where TX Data Sent successfully. - RF24_TX_DS = 1 << TX_DS, + RF24_TX_DS = 1 << nRF24L01::TX_DS, /// Represents an event where RX Data is Ready to `RF24::read()`. - RF24_RX_DR = 1 << RX_DR, + RF24_RX_DR = 1 << nRF24L01::RX_DR, /// Equivalent to `RF24_RX_DR | RF24_TX_DS | RF24_TX_DF`. - RF24_IRQ_ALL = (1 << MASK_MAX_RT) | (1 << TX_DS) | (1 << RX_DR), + RF24_IRQ_ALL = (1 << nRF24L01::MASK_MAX_RT) | (1 << nRF24L01::TX_DS) | (1 << nRF24L01::RX_DR), } rf24_irq_flags_e; /** diff --git a/nRF24L01.h b/nRF24L01.h index d4ffd281d..5d838308b 100644 --- a/nRF24L01.h +++ b/nRF24L01.h @@ -23,106 +23,117 @@ DEALINGS IN THE SOFTWARE. */ +#ifndef NRF24L01_H_ +#define NRF24L01_H_ + +#include + +namespace nRF24L01 { + /* Memory Map */ -#define NRF_CONFIG 0x00 -#define EN_AA 0x01 -#define EN_RXADDR 0x02 -#define SETUP_AW 0x03 -#define SETUP_RETR 0x04 -#define RF_CH 0x05 -#define RF_SETUP 0x06 -#define NRF_STATUS 0x07 -#define OBSERVE_TX 0x08 -#define CD 0x09 -#define RX_ADDR_P0 0x0A -#define RX_ADDR_P1 0x0B -#define RX_ADDR_P2 0x0C -#define RX_ADDR_P3 0x0D -#define RX_ADDR_P4 0x0E -#define RX_ADDR_P5 0x0F -#define TX_ADDR 0x10 -#define RX_PW_P0 0x11 -#define RX_PW_P1 0x12 -#define RX_PW_P2 0x13 -#define RX_PW_P3 0x14 -#define RX_PW_P4 0x15 -#define RX_PW_P5 0x16 -#define FIFO_STATUS 0x17 -#define DYNPD 0x1C -#define FEATURE 0x1D +constexpr uint8_t NRF_CONFIG = 0x00; +constexpr uint8_t EN_AA = 0x01; +constexpr uint8_t EN_RXADDR = 0x02; +constexpr uint8_t SETUP_AW = 0x03; +constexpr uint8_t SETUP_RETR = 0x04; +constexpr uint8_t RF_CH = 0x05; +constexpr uint8_t RF_SETUP = 0x06; +constexpr uint8_t NRF_STATUS = 0x07; +constexpr uint8_t OBSERVE_TX = 0x08; +constexpr uint8_t CD = 0x09; +constexpr uint8_t RX_ADDR_P0 = 0x0A; +constexpr uint8_t RX_ADDR_P1 = 0x0B; +constexpr uint8_t RX_ADDR_P2 = 0x0C; +constexpr uint8_t RX_ADDR_P3 = 0x0D; +constexpr uint8_t RX_ADDR_P4 = 0x0E; +constexpr uint8_t RX_ADDR_P5 = 0x0F; +constexpr uint8_t TX_ADDR = 0x10; +constexpr uint8_t RX_PW_P0 = 0x11; +constexpr uint8_t RX_PW_P1 = 0x12; +constexpr uint8_t RX_PW_P2 = 0x13; +constexpr uint8_t RX_PW_P3 = 0x14; +constexpr uint8_t RX_PW_P4 = 0x15; +constexpr uint8_t RX_PW_P5 = 0x16; +constexpr uint8_t FIFO_STATUS = 0x17; +constexpr uint8_t DYNPD = 0x1C; +constexpr uint8_t RF24_FEATURE = 0x1D; /* Bit Mnemonics */ -#define MASK_RX_DR 6 -#define MASK_TX_DS 5 -#define MASK_MAX_RT 4 -#define EN_CRC 3 -#define CRCO 2 -#define PWR_UP 1 -#define PRIM_RX 0 -#define ENAA_P5 5 -#define ENAA_P4 4 -#define ENAA_P3 3 -#define ENAA_P2 2 -#define ENAA_P1 1 -#define ENAA_P0 0 -#define ERX_P5 5 -#define ERX_P4 4 -#define ERX_P3 3 -#define ERX_P2 2 -#define ERX_P1 1 -#define ERX_P0 0 -#define AW 0 -#define ARD 4 -#define ARC 0 -#define PLL_LOCK 4 -#define CONT_WAVE 7 -#define RF_DR 3 -#define RF_PWR 6 -#define RX_DR 6 -#define TX_DS 5 -#define MAX_RT 4 -#define RX_P_NO 1 -#define TX_FULL 0 -#define PLOS_CNT 4 -#define ARC_CNT 0 -#define TX_REUSE 6 -#define FIFO_FULL 5 -#define TX_EMPTY 4 -#define RX_FULL 1 -#define RX_EMPTY 0 -#define DPL_P5 5 -#define DPL_P4 4 -#define DPL_P3 3 -#define DPL_P2 2 -#define DPL_P1 1 -#define DPL_P0 0 -#define EN_DPL 2 -#define EN_ACK_PAY 1 -#define EN_DYN_ACK 0 +constexpr uint8_t MASK_RX_DR = 6; +constexpr uint8_t MASK_TX_DS = 5; +constexpr uint8_t MASK_MAX_RT = 4; +constexpr uint8_t EN_CRC = 3; +constexpr uint8_t CRCO = 2; +constexpr uint8_t PWR_UP = 1; +constexpr uint8_t PRIM_RX = 0; +constexpr uint8_t ENAA_P5 = 5; +constexpr uint8_t ENAA_P4 = 4; +constexpr uint8_t ENAA_P3 = 3; +constexpr uint8_t ENAA_P2 = 2; +constexpr uint8_t ENAA_P1 = 1; +constexpr uint8_t ENAA_P0 = 0; +constexpr uint8_t ERX_P5 = 5; +constexpr uint8_t ERX_P4 = 4; +constexpr uint8_t ERX_P3 = 3; +constexpr uint8_t ERX_P2 = 2; +constexpr uint8_t ERX_P1 = 1; +constexpr uint8_t ERX_P0 = 0; +constexpr uint8_t AW = 0; +constexpr uint8_t ARD = 4; +constexpr uint8_t ARC = 0; +constexpr uint8_t PLL_LOCK = 4; +constexpr uint8_t CONT_WAVE = 7; +constexpr uint8_t RF_DR = 3; +constexpr uint8_t RF_PWR = 6; +constexpr uint8_t RX_DR = 6; +constexpr uint8_t TX_DS = 5; +constexpr uint8_t MAX_RT = 4; +constexpr uint8_t RX_P_NO = 1; +constexpr uint8_t TX_FULL = 0; +constexpr uint8_t PLOS_CNT = 4; +constexpr uint8_t ARC_CNT = 0; +constexpr uint8_t TX_REUSE = 6; +constexpr uint8_t FIFO_FULL = 5; +constexpr uint8_t TX_EMPTY = 4; +constexpr uint8_t RX_FULL = 1; +constexpr uint8_t RX_EMPTY = 0; +constexpr uint8_t DPL_P5 = 5; +constexpr uint8_t DPL_P4 = 4; +constexpr uint8_t DPL_P3 = 3; +constexpr uint8_t DPL_P2 = 2; +constexpr uint8_t DPL_P1 = 1; +constexpr uint8_t DPL_P0 = 0; +constexpr uint8_t EN_DPL = 2; +constexpr uint8_t EN_ACK_PAY = 1; +constexpr uint8_t EN_DYN_ACK = 0; /* Instruction Mnemonics */ -#define R_REGISTER 0x00 -#define W_REGISTER 0x20 -#define REGISTER_MASK 0x1F -#define ACTIVATE 0x50 -#define R_RX_PL_WID 0x60 -#define R_RX_PAYLOAD 0x61 -#define W_TX_PAYLOAD 0xA0 -#define W_ACK_PAYLOAD 0xA8 -#define FLUSH_TX 0xE1 -#define FLUSH_RX 0xE2 -#define REUSE_TX_PL 0xE3 -#define RF24_NOP 0xFF +constexpr uint8_t R_REGISTER = 0x00; +constexpr uint8_t W_REGISTER = 0x20; +constexpr uint8_t REGISTER_MASK = 0x1F; +constexpr uint8_t ACTIVATE = 0x50; +constexpr uint8_t R_RX_PL_WID = 0x60; +constexpr uint8_t R_RX_PAYLOAD = 0x61; +constexpr uint8_t W_TX_PAYLOAD = 0xA0; +constexpr uint8_t W_ACK_PAYLOAD = 0xA8; +constexpr uint8_t FLUSH_TX = 0xE1; +constexpr uint8_t FLUSH_RX = 0xE2; +constexpr uint8_t REUSE_TX_PL = 0xE3; +constexpr uint8_t RF24_NOP = 0xFF; /* Non-P omissions */ -#define LNA_HCURR 0 +constexpr uint8_t LNA_HCURR = 0; /* P model memory Map */ -#define RPD 0x09 -#define W_TX_PAYLOAD_NO_ACK 0xB0 +constexpr uint8_t RPD = 0x09; +constexpr uint8_t W_TX_PAYLOAD_NO_ACK = 0xB0; /* P model bit Mnemonics */ -#define RF_DR_LOW 5 -#define RF_DR_HIGH 3 -#define RF_PWR_LOW 1 -#define RF_PWR_HIGH 2 +constexpr uint8_t RF_DR_LOW = 5; +constexpr uint8_t RF_DR_HIGH = 3; +constexpr uint8_t RF_PWR_LOW = 1; +constexpr uint8_t RF_PWR_HIGH = 2; + +} // namespace nRF24L01 + +#endif // NRF24L01_H_ From f177375a10bd6c19b41cf4759438ade7b522ec27 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Fri, 3 Apr 2026 22:37:17 +0000 Subject: [PATCH 2/5] Initial plan From 2bd5fa1c61e9dd17158a296b66eb96c431a1fd12 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Sat, 4 Apr 2026 00:31:36 +0000 Subject: [PATCH 3/5] refactor: namespace nRF24L01.h on master base, rename CONFIG/STATUS, revert #1065 changes Agent-Logs-Url: https://github.com/nRF24/RF24/sessions/f6f20af3-c294-4719-be64-cc4df041d703 Co-authored-by: 2bndy5 <14963867+2bndy5@users.noreply.github.com> --- RF24.cpp | 48 ++++++++++++++++++++++++------------------------ RF24.h | 6 +++--- nRF24L01.h | 52 ++++++++++++++++++++++++++-------------------------- 3 files changed, 53 insertions(+), 53 deletions(-) diff --git a/RF24.cpp b/RF24.cpp index b8a5f7899..4ea9d13aa 100644 --- a/RF24.cpp +++ b/RF24.cpp @@ -720,7 +720,7 @@ void RF24::printDetails(void) print_byte_register(PSTR("EN_RXADDR"), EN_RXADDR); print_byte_register(PSTR("RF_CH\t"), RF_CH); print_byte_register(PSTR("RF_SETUP"), RF_SETUP); - print_byte_register(PSTR("CONFIG\t"), NRF_CONFIG); + print_byte_register(PSTR("CONFIG\t"), CONFIG); print_byte_register(PSTR("DYNPD/FEATURE"), DYNPD, 2); printf_P(PSTR("Data Rate\t" PRIPSTR @@ -814,7 +814,7 @@ void RF24::printPrettyDetails(void) static_cast(static_cast(autoAck & _BV(ENAA_P0)) + 48)); } - config_reg = read_register(NRF_CONFIG); + config_reg = read_register(CONFIG); printf_P(PSTR("Primary Mode\t\t= %cX\r\n"), config_reg & _BV(PRIM_RX) ? 'R' : 'T'); print_address_register(PSTR("TX address\t"), TX_ADDR); @@ -896,7 +896,7 @@ uint16_t RF24::sprintfPrettyDetails(char* debugging_information) } offset += sprintf_P( debugging_information + offset, format_str2, - (read_register(NRF_CONFIG) & _BV(PRIM_RX) ? 'R' : 'T')); + (read_register(CONFIG) & _BV(PRIM_RX) ? 'R' : 'T')); offset += sprintf_address_register(debugging_information + offset, TX_ADDR); uint8_t openPipes = read_register(EN_RXADDR); for (uint8_t i = 0; i < 6; ++i) { @@ -921,7 +921,7 @@ uint16_t RF24::sprintfPrettyDetails(char* debugging_information) void RF24::encodeRadioDetails(uint8_t* encoded_details) { uint8_t end = FEATURE + 1; - for (uint8_t i = NRF_CONFIG; i < end; ++i) { + for (uint8_t i = CONFIG; i < end; ++i) { if (i == RX_ADDR_P0 || i == RX_ADDR_P1 || i == TX_ADDR) { // get 40-bit registers read_register(i, encoded_details, 5); @@ -1105,7 +1105,7 @@ bool RF24::_init_radio() // Reset current status // Notice reset and flush is the last thing we do - write_register(NRF_STATUS, RF24_IRQ_ALL); + write_register(STATUS, RF24_IRQ_ALL); // Flush buffers flush_rx(); @@ -1118,8 +1118,8 @@ bool RF24::_init_radio() // 16-bit CRC (CRC required by auto-ack) // Do not write CE high so radio will remain in standby I mode // PTX should use only 22uA of power - write_register(NRF_CONFIG, (_BV(EN_CRC) | _BV(CRCO) | _BV(MASK_RX_DR) | _BV(MASK_TX_DS) | _BV(MASK_MAX_RT))); - config_reg = read_register(NRF_CONFIG); + write_register(CONFIG, (_BV(EN_CRC) | _BV(CRCO) | _BV(MASK_RX_DR) | _BV(MASK_TX_DS) | _BV(MASK_MAX_RT))); + config_reg = read_register(CONFIG); powerUp(); @@ -1149,8 +1149,8 @@ void RF24::startListening(void) powerUp(); #endif config_reg |= _BV(PRIM_RX); - write_register(NRF_CONFIG, config_reg); - write_register(NRF_STATUS, RF24_IRQ_ALL); + write_register(CONFIG, config_reg); + write_register(STATUS, RF24_IRQ_ALL); ce(HIGH); // Restore the pipe0 address, if exists @@ -1178,7 +1178,7 @@ void RF24::stopListening(void) } config_reg = static_cast(config_reg & ~_BV(PRIM_RX)); - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); #if defined(RF24_TINY) || defined(LITTLEWIRE) // for 3 pins solution TX mode is only left with additional powerDown/powerUp cycle @@ -1215,7 +1215,7 @@ void RF24::powerDown(void) { ce(LOW); // Guarantee CE is low on powerDown config_reg = static_cast(config_reg & ~_BV(PWR_UP)); - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); } /****************************************************************************/ @@ -1226,7 +1226,7 @@ void RF24::powerUp(void) // if not powered up then power up and wait for the radio to initialize if (!(config_reg & _BV(PWR_UP))) { config_reg |= _BV(PWR_UP); - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); // For nRF24L01+ to go from power down mode to TX or RX mode it must first pass through stand-by mode. // There must be a delay of Tpd2stby (see Table 16.) after the nRF24L01+ leaves power down mode before @@ -1325,7 +1325,7 @@ bool RF24::write(const void* buf, uint8_t len, const bool multicast) ce(LOW); - write_register(NRF_STATUS, RF24_IRQ_ALL); + write_register(STATUS, RF24_IRQ_ALL); //Max retries exceeded if (status & RF24_TX_DF) { @@ -1399,7 +1399,7 @@ bool RF24::writeBlocking(const void* buf, uint8_t len, uint32_t timeout) void RF24::reUseTX() { ce(LOW); - write_register(NRF_STATUS, RF24_TX_DF); //Clear max retry flag + write_register(STATUS, RF24_TX_DF); //Clear max retry flag read_register(REUSE_TX_PL, (uint8_t*)nullptr, 0); IF_RF24_DEBUG(printf_P("[Reusing payload in TX FIFO]");); ce(HIGH); //Re-Transfer packet @@ -1526,7 +1526,7 @@ bool RF24::txStandBy() #endif while (!(read_register(FIFO_STATUS) & _BV(TX_EMPTY))) { if (status & RF24_TX_DF) { - write_register(NRF_STATUS, RF24_TX_DF); + write_register(STATUS, RF24_TX_DF); ce(LOW); flush_tx(); //Non blocking, flush the data #if defined(FAILURE_HANDLING) @@ -1562,7 +1562,7 @@ bool RF24::txStandBy(uint32_t timeout, bool startTx) while (!(read_register(FIFO_STATUS) & _BV(TX_EMPTY))) { if (status & RF24_TX_DF) { - write_register(NRF_STATUS, RF24_TX_DF); + write_register(STATUS, RF24_TX_DF); ce(LOW); // Set re-transmit ce(HIGH); if (millis() - start >= timeout) { @@ -1597,7 +1597,7 @@ void RF24::maskIRQ(bool tx, bool fail, bool rx) config_reg = static_cast(config_reg & ~(1 << MASK_MAX_RT | 1 << MASK_TX_DS | 1 << MASK_RX_DR)); /* set the specified interrupt flags */ config_reg = static_cast(config_reg | fail << MASK_MAX_RT | tx << MASK_TX_DS | rx << MASK_RX_DR); - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); } /****************************************************************************/ @@ -1640,7 +1640,7 @@ void RF24::read(void* buf, uint8_t len) read_payload(buf, len); //Clear the only applicable interrupt flags - write_register(NRF_STATUS, RF24_RX_DR); + write_register(STATUS, RF24_RX_DR); } /****************************************************************************/ @@ -1649,7 +1649,7 @@ void RF24::whatHappened(bool& tx_ok, bool& tx_fail, bool& rx_ready) { // Read the status & reset the status in one easy call // Or is that such a good idea? - write_register(NRF_STATUS, RF24_IRQ_ALL); + write_register(STATUS, RF24_IRQ_ALL); // Report to the user what happened tx_ok = status & RF24_TX_DS; @@ -1661,7 +1661,7 @@ void RF24::whatHappened(bool& tx_ok, bool& tx_fail, bool& rx_ready) uint8_t RF24::clearStatusFlags(uint8_t flags) { - write_register(NRF_STATUS, flags & RF24_IRQ_ALL); + write_register(STATUS, flags & RF24_IRQ_ALL); return status; } @@ -1671,7 +1671,7 @@ void RF24::setStatusFlags(uint8_t flags) { // flip the `flags` to translate from "human understanding" config_reg = (config_reg & ~RF24_IRQ_ALL) | (~flags & RF24_IRQ_ALL); - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); } /****************************************************************************/ @@ -2061,7 +2061,7 @@ void RF24::setCRCLength(rf24_crclength_e length) config_reg |= _BV(EN_CRC); config_reg |= _BV(CRCO); } - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); } /****************************************************************************/ @@ -2070,7 +2070,7 @@ rf24_crclength_e RF24::getCRCLength(void) { rf24_crclength_e result = RF24_CRC_DISABLED; uint8_t AA = read_register(EN_AA); - config_reg = read_register(NRF_CONFIG); + config_reg = read_register(CONFIG); if (config_reg & _BV(EN_CRC) || AA) { if (config_reg & _BV(CRCO)) { @@ -2089,7 +2089,7 @@ rf24_crclength_e RF24::getCRCLength(void) void RF24::disableCRC(void) { config_reg = static_cast(config_reg & ~_BV(EN_CRC)); - write_register(NRF_CONFIG, config_reg); + write_register(CONFIG, config_reg); } /****************************************************************************/ diff --git a/RF24.h b/RF24.h index 4f77f0d9d..f8fa4737e 100644 --- a/RF24.h +++ b/RF24.h @@ -183,7 +183,7 @@ class RF24 uint8_t payload_size; /* Fixed size of payloads */ uint8_t pipe0_reading_address[5]; /* Last address set on pipe 0 for reading. */ uint8_t pipe0_writing_address[5]; /* Last address set on pipe 0 for writing. */ - uint8_t config_reg; /* For storing the value of the NRF_CONFIG register */ + uint8_t config_reg; /* For storing the value of the CONFIG register */ bool _is_p_variant; /* For storing the result of testing the toggleFeatures() affect */ bool _is_p0_rx; /* For keeping track of pipe 0's usage in user-triggered RX mode. */ @@ -760,14 +760,14 @@ class RF24 * Registers names and/or data corresponding to the index of the `encoded_details` array: * | index | register/data | * |------:|:--------------| - * | 0 | NRF_CONFIG | + * | 0 | CONFIG | * | 1 | EN_AA | * | 2 | EN_RXADDR | * | 3 | SETUP_AW | * | 4 | SETUP_RETR | * | 5 | RF_CH | * | 6 | RF_SETUP | - * | 7 | NRF_STATUS | + * | 7 | STATUS | * | 8 | OBSERVE_TX | * | 9 | CD (aka RPD) | * | 10-14 | RX_ADDR_P0 | diff --git a/nRF24L01.h b/nRF24L01.h index 5d838308b..668092122 100644 --- a/nRF24L01.h +++ b/nRF24L01.h @@ -31,32 +31,32 @@ namespace nRF24L01 { /* Memory Map */ -constexpr uint8_t NRF_CONFIG = 0x00; -constexpr uint8_t EN_AA = 0x01; -constexpr uint8_t EN_RXADDR = 0x02; -constexpr uint8_t SETUP_AW = 0x03; -constexpr uint8_t SETUP_RETR = 0x04; -constexpr uint8_t RF_CH = 0x05; -constexpr uint8_t RF_SETUP = 0x06; -constexpr uint8_t NRF_STATUS = 0x07; -constexpr uint8_t OBSERVE_TX = 0x08; -constexpr uint8_t CD = 0x09; -constexpr uint8_t RX_ADDR_P0 = 0x0A; -constexpr uint8_t RX_ADDR_P1 = 0x0B; -constexpr uint8_t RX_ADDR_P2 = 0x0C; -constexpr uint8_t RX_ADDR_P3 = 0x0D; -constexpr uint8_t RX_ADDR_P4 = 0x0E; -constexpr uint8_t RX_ADDR_P5 = 0x0F; -constexpr uint8_t TX_ADDR = 0x10; -constexpr uint8_t RX_PW_P0 = 0x11; -constexpr uint8_t RX_PW_P1 = 0x12; -constexpr uint8_t RX_PW_P2 = 0x13; -constexpr uint8_t RX_PW_P3 = 0x14; -constexpr uint8_t RX_PW_P4 = 0x15; -constexpr uint8_t RX_PW_P5 = 0x16; -constexpr uint8_t FIFO_STATUS = 0x17; -constexpr uint8_t DYNPD = 0x1C; -constexpr uint8_t RF24_FEATURE = 0x1D; +constexpr uint8_t CONFIG = 0x00; +constexpr uint8_t EN_AA = 0x01; +constexpr uint8_t EN_RXADDR = 0x02; +constexpr uint8_t SETUP_AW = 0x03; +constexpr uint8_t SETUP_RETR = 0x04; +constexpr uint8_t RF_CH = 0x05; +constexpr uint8_t RF_SETUP = 0x06; +constexpr uint8_t STATUS = 0x07; +constexpr uint8_t OBSERVE_TX = 0x08; +constexpr uint8_t CD = 0x09; +constexpr uint8_t RX_ADDR_P0 = 0x0A; +constexpr uint8_t RX_ADDR_P1 = 0x0B; +constexpr uint8_t RX_ADDR_P2 = 0x0C; +constexpr uint8_t RX_ADDR_P3 = 0x0D; +constexpr uint8_t RX_ADDR_P4 = 0x0E; +constexpr uint8_t RX_ADDR_P5 = 0x0F; +constexpr uint8_t TX_ADDR = 0x10; +constexpr uint8_t RX_PW_P0 = 0x11; +constexpr uint8_t RX_PW_P1 = 0x12; +constexpr uint8_t RX_PW_P2 = 0x13; +constexpr uint8_t RX_PW_P3 = 0x14; +constexpr uint8_t RX_PW_P4 = 0x15; +constexpr uint8_t RX_PW_P5 = 0x16; +constexpr uint8_t FIFO_STATUS = 0x17; +constexpr uint8_t DYNPD = 0x1C; +constexpr uint8_t FEATURE = 0x1D; /* Bit Mnemonics */ constexpr uint8_t MASK_RX_DR = 6; From 8c509113919e3da0d08e67b2d9b458c9636cc442 Mon Sep 17 00:00:00 2001 From: Brendan <2bndy5@gmail.com> Date: Fri, 3 Apr 2026 18:37:15 -0700 Subject: [PATCH 4/5] fmt --- nRF24L01.h | 170 ++++++++++++++++++++++++++--------------------------- 1 file changed, 85 insertions(+), 85 deletions(-) diff --git a/nRF24L01.h b/nRF24L01.h index 668092122..92ccbc107 100644 --- a/nRF24L01.h +++ b/nRF24L01.h @@ -31,107 +31,107 @@ namespace nRF24L01 { /* Memory Map */ -constexpr uint8_t CONFIG = 0x00; -constexpr uint8_t EN_AA = 0x01; -constexpr uint8_t EN_RXADDR = 0x02; -constexpr uint8_t SETUP_AW = 0x03; -constexpr uint8_t SETUP_RETR = 0x04; -constexpr uint8_t RF_CH = 0x05; -constexpr uint8_t RF_SETUP = 0x06; -constexpr uint8_t STATUS = 0x07; -constexpr uint8_t OBSERVE_TX = 0x08; -constexpr uint8_t CD = 0x09; -constexpr uint8_t RX_ADDR_P0 = 0x0A; -constexpr uint8_t RX_ADDR_P1 = 0x0B; -constexpr uint8_t RX_ADDR_P2 = 0x0C; -constexpr uint8_t RX_ADDR_P3 = 0x0D; -constexpr uint8_t RX_ADDR_P4 = 0x0E; -constexpr uint8_t RX_ADDR_P5 = 0x0F; -constexpr uint8_t TX_ADDR = 0x10; -constexpr uint8_t RX_PW_P0 = 0x11; -constexpr uint8_t RX_PW_P1 = 0x12; -constexpr uint8_t RX_PW_P2 = 0x13; -constexpr uint8_t RX_PW_P3 = 0x14; -constexpr uint8_t RX_PW_P4 = 0x15; -constexpr uint8_t RX_PW_P5 = 0x16; +constexpr uint8_t CONFIG = 0x00; +constexpr uint8_t EN_AA = 0x01; +constexpr uint8_t EN_RXADDR = 0x02; +constexpr uint8_t SETUP_AW = 0x03; +constexpr uint8_t SETUP_RETR = 0x04; +constexpr uint8_t RF_CH = 0x05; +constexpr uint8_t RF_SETUP = 0x06; +constexpr uint8_t STATUS = 0x07; +constexpr uint8_t OBSERVE_TX = 0x08; +constexpr uint8_t CD = 0x09; +constexpr uint8_t RX_ADDR_P0 = 0x0A; +constexpr uint8_t RX_ADDR_P1 = 0x0B; +constexpr uint8_t RX_ADDR_P2 = 0x0C; +constexpr uint8_t RX_ADDR_P3 = 0x0D; +constexpr uint8_t RX_ADDR_P4 = 0x0E; +constexpr uint8_t RX_ADDR_P5 = 0x0F; +constexpr uint8_t TX_ADDR = 0x10; +constexpr uint8_t RX_PW_P0 = 0x11; +constexpr uint8_t RX_PW_P1 = 0x12; +constexpr uint8_t RX_PW_P2 = 0x13; +constexpr uint8_t RX_PW_P3 = 0x14; +constexpr uint8_t RX_PW_P4 = 0x15; +constexpr uint8_t RX_PW_P5 = 0x16; constexpr uint8_t FIFO_STATUS = 0x17; -constexpr uint8_t DYNPD = 0x1C; -constexpr uint8_t FEATURE = 0x1D; +constexpr uint8_t DYNPD = 0x1C; +constexpr uint8_t FEATURE = 0x1D; /* Bit Mnemonics */ -constexpr uint8_t MASK_RX_DR = 6; -constexpr uint8_t MASK_TX_DS = 5; +constexpr uint8_t MASK_RX_DR = 6; +constexpr uint8_t MASK_TX_DS = 5; constexpr uint8_t MASK_MAX_RT = 4; -constexpr uint8_t EN_CRC = 3; -constexpr uint8_t CRCO = 2; -constexpr uint8_t PWR_UP = 1; -constexpr uint8_t PRIM_RX = 0; -constexpr uint8_t ENAA_P5 = 5; -constexpr uint8_t ENAA_P4 = 4; -constexpr uint8_t ENAA_P3 = 3; -constexpr uint8_t ENAA_P2 = 2; -constexpr uint8_t ENAA_P1 = 1; -constexpr uint8_t ENAA_P0 = 0; -constexpr uint8_t ERX_P5 = 5; -constexpr uint8_t ERX_P4 = 4; -constexpr uint8_t ERX_P3 = 3; -constexpr uint8_t ERX_P2 = 2; -constexpr uint8_t ERX_P1 = 1; -constexpr uint8_t ERX_P0 = 0; -constexpr uint8_t AW = 0; -constexpr uint8_t ARD = 4; -constexpr uint8_t ARC = 0; -constexpr uint8_t PLL_LOCK = 4; -constexpr uint8_t CONT_WAVE = 7; -constexpr uint8_t RF_DR = 3; -constexpr uint8_t RF_PWR = 6; -constexpr uint8_t RX_DR = 6; -constexpr uint8_t TX_DS = 5; -constexpr uint8_t MAX_RT = 4; -constexpr uint8_t RX_P_NO = 1; -constexpr uint8_t TX_FULL = 0; -constexpr uint8_t PLOS_CNT = 4; -constexpr uint8_t ARC_CNT = 0; -constexpr uint8_t TX_REUSE = 6; -constexpr uint8_t FIFO_FULL = 5; -constexpr uint8_t TX_EMPTY = 4; -constexpr uint8_t RX_FULL = 1; -constexpr uint8_t RX_EMPTY = 0; -constexpr uint8_t DPL_P5 = 5; -constexpr uint8_t DPL_P4 = 4; -constexpr uint8_t DPL_P3 = 3; -constexpr uint8_t DPL_P2 = 2; -constexpr uint8_t DPL_P1 = 1; -constexpr uint8_t DPL_P0 = 0; -constexpr uint8_t EN_DPL = 2; -constexpr uint8_t EN_ACK_PAY = 1; -constexpr uint8_t EN_DYN_ACK = 0; +constexpr uint8_t EN_CRC = 3; +constexpr uint8_t CRCO = 2; +constexpr uint8_t PWR_UP = 1; +constexpr uint8_t PRIM_RX = 0; +constexpr uint8_t ENAA_P5 = 5; +constexpr uint8_t ENAA_P4 = 4; +constexpr uint8_t ENAA_P3 = 3; +constexpr uint8_t ENAA_P2 = 2; +constexpr uint8_t ENAA_P1 = 1; +constexpr uint8_t ENAA_P0 = 0; +constexpr uint8_t ERX_P5 = 5; +constexpr uint8_t ERX_P4 = 4; +constexpr uint8_t ERX_P3 = 3; +constexpr uint8_t ERX_P2 = 2; +constexpr uint8_t ERX_P1 = 1; +constexpr uint8_t ERX_P0 = 0; +constexpr uint8_t AW = 0; +constexpr uint8_t ARD = 4; +constexpr uint8_t ARC = 0; +constexpr uint8_t PLL_LOCK = 4; +constexpr uint8_t CONT_WAVE = 7; +constexpr uint8_t RF_DR = 3; +constexpr uint8_t RF_PWR = 6; +constexpr uint8_t RX_DR = 6; +constexpr uint8_t TX_DS = 5; +constexpr uint8_t MAX_RT = 4; +constexpr uint8_t RX_P_NO = 1; +constexpr uint8_t TX_FULL = 0; +constexpr uint8_t PLOS_CNT = 4; +constexpr uint8_t ARC_CNT = 0; +constexpr uint8_t TX_REUSE = 6; +constexpr uint8_t FIFO_FULL = 5; +constexpr uint8_t TX_EMPTY = 4; +constexpr uint8_t RX_FULL = 1; +constexpr uint8_t RX_EMPTY = 0; +constexpr uint8_t DPL_P5 = 5; +constexpr uint8_t DPL_P4 = 4; +constexpr uint8_t DPL_P3 = 3; +constexpr uint8_t DPL_P2 = 2; +constexpr uint8_t DPL_P1 = 1; +constexpr uint8_t DPL_P0 = 0; +constexpr uint8_t EN_DPL = 2; +constexpr uint8_t EN_ACK_PAY = 1; +constexpr uint8_t EN_DYN_ACK = 0; /* Instruction Mnemonics */ -constexpr uint8_t R_REGISTER = 0x00; -constexpr uint8_t W_REGISTER = 0x20; +constexpr uint8_t R_REGISTER = 0x00; +constexpr uint8_t W_REGISTER = 0x20; constexpr uint8_t REGISTER_MASK = 0x1F; -constexpr uint8_t ACTIVATE = 0x50; -constexpr uint8_t R_RX_PL_WID = 0x60; -constexpr uint8_t R_RX_PAYLOAD = 0x61; -constexpr uint8_t W_TX_PAYLOAD = 0xA0; +constexpr uint8_t ACTIVATE = 0x50; +constexpr uint8_t R_RX_PL_WID = 0x60; +constexpr uint8_t R_RX_PAYLOAD = 0x61; +constexpr uint8_t W_TX_PAYLOAD = 0xA0; constexpr uint8_t W_ACK_PAYLOAD = 0xA8; -constexpr uint8_t FLUSH_TX = 0xE1; -constexpr uint8_t FLUSH_RX = 0xE2; -constexpr uint8_t REUSE_TX_PL = 0xE3; -constexpr uint8_t RF24_NOP = 0xFF; +constexpr uint8_t FLUSH_TX = 0xE1; +constexpr uint8_t FLUSH_RX = 0xE2; +constexpr uint8_t REUSE_TX_PL = 0xE3; +constexpr uint8_t RF24_NOP = 0xFF; /* Non-P omissions */ constexpr uint8_t LNA_HCURR = 0; /* P model memory Map */ -constexpr uint8_t RPD = 0x09; +constexpr uint8_t RPD = 0x09; constexpr uint8_t W_TX_PAYLOAD_NO_ACK = 0xB0; /* P model bit Mnemonics */ -constexpr uint8_t RF_DR_LOW = 5; -constexpr uint8_t RF_DR_HIGH = 3; -constexpr uint8_t RF_PWR_LOW = 1; +constexpr uint8_t RF_DR_LOW = 5; +constexpr uint8_t RF_DR_HIGH = 3; +constexpr uint8_t RF_PWR_LOW = 1; constexpr uint8_t RF_PWR_HIGH = 2; } // namespace nRF24L01 From 7c2159a780d4aaf850d22db7219f82331d060e63 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Sat, 4 Apr 2026 01:52:57 +0000 Subject: [PATCH 5/5] refactor: rename RF24_NOP to NOP inside nRF24L01 namespace Agent-Logs-Url: https://github.com/nRF24/RF24/sessions/ca2acbf8-daff-4e5d-b930-c66d3b024bc4 Co-authored-by: 2bndy5 <14963867+2bndy5@users.noreply.github.com> --- RF24.cpp | 8 ++++---- nRF24L01.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/RF24.cpp b/RF24.cpp index 4ea9d13aa..025930ebf 100644 --- a/RF24.cpp +++ b/RF24.cpp @@ -159,7 +159,7 @@ void RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len) *ptx++ = reg; while (len--) { - *ptx++ = RF24_NOP; // Dummy operation, just for reading + *ptx++ = NOP; // Dummy operation, just for reading } #if defined(RF24_RP2) @@ -209,7 +209,7 @@ uint8_t RF24::read_register(uint8_t reg) uint8_t* prx = spi_rxbuff; uint8_t* ptx = spi_txbuff; *ptx++ = reg; - *ptx++ = RF24_NOP; // Dummy operation, just for reading + *ptx++ = NOP; // Dummy operation, just for reading #if defined(RF24_RP2) _spi->transfernb((const uint8_t*)spi_txbuff, spi_rxbuff, 2); @@ -415,7 +415,7 @@ void RF24::read_payload(void* buf, uint8_t data_len) *ptx++ = R_RX_PAYLOAD; while (--size) { - *ptx++ = RF24_NOP; + *ptx++ = NOP; } size = static_cast(data_len + blank_len + 1); // Size has been lost during while, re affect @@ -1685,7 +1685,7 @@ uint8_t RF24::getStatusFlags() uint8_t RF24::update() { - read_register(RF24_NOP, (uint8_t*)nullptr, 0); + read_register(NOP, (uint8_t*)nullptr, 0); return status; } diff --git a/nRF24L01.h b/nRF24L01.h index 92ccbc107..7abde108f 100644 --- a/nRF24L01.h +++ b/nRF24L01.h @@ -119,7 +119,7 @@ constexpr uint8_t W_ACK_PAYLOAD = 0xA8; constexpr uint8_t FLUSH_TX = 0xE1; constexpr uint8_t FLUSH_RX = 0xE2; constexpr uint8_t REUSE_TX_PL = 0xE3; -constexpr uint8_t RF24_NOP = 0xFF; +constexpr uint8_t NOP = 0xFF; /* Non-P omissions */ constexpr uint8_t LNA_HCURR = 0;