fpga_uart_top.sv

module fpga_uart_top (
    input logic clk_125,  // Sch=SYSCLK
    input logic [4:4] ja_p,  // Sch=JA4_P (Pin 9)
    output logic [4:4] ja_n,  // Sch=JA4_N (Pin 10)
    input logic [0:0] btn,  // Sch=BTN0
    output logic [2:0] led,  // Sch=LED0, LED1, LED2
    output logic led4_r  // Sch=LED4_R
);

  localparam int unsigned CLK_FREQ_HZ = 125_000_000;
  localparam int unsigned UART_BAUD_RATE = 115200;
  localparam int unsigned BTN_DEBOUNCE_TIME_MS = 1;
  localparam int unsigned LED_PULSE_WIDTH_MS = 16;


  logic reset;

  synchronous_debouncer #(
      .CLK_FREQ_HZ(CLK_FREQ_HZ),
      .DEBOUNCE_TIME_MS(BTN_DEBOUNCE_TIME_MS)
  ) btn_synchronous_debouncer (
      .clk(clk_125),
      .btn_in(btn[0]),
      .btn_out(reset)
  );


  logic rx_valid;
  logic tx_busy;
  logic rx_frame_error;

  uart_echo #(
      .CLK_FREQ_HZ(CLK_FREQ_HZ),
      .BAUD_RATE  (UART_BAUD_RATE)
  ) uart_echo_inst (
      .clk(clk_125),
      .reset(reset),
      .rx(ja_p[4]),
      .tx(ja_n[4]),
      .rx_valid(rx_valid),
      .tx_busy(tx_busy),
      .rx_frame_error(rx_frame_error)
  );


  retriggerable_one_shot #(
      .CLK_FREQ_HZ(CLK_FREQ_HZ),
      .PULSE_WIDTH_MS(LED_PULSE_WIDTH_MS)
  ) led_activity[2:0] (
      .clk(clk_125),
      .reset(reset),
      .trigger_in({rx_frame_error, tx_busy, rx_valid}),
      .pulse_active({led4_r, led[2], led[1]})  // RX Error, TX Act, RX Act indicators
  );

  assign led[0] = reset;  // Reset indicator


endmodule