@@ -26,25 +26,27 @@ HRESULT CLR_HW_Hardware::Hardware_Initialize()
2626
2727 NANOCLR_HEADER ();
2828
29- if (m_fInitialized == false )
29+ if (m_fInitialized == false )
3030 {
3131 Time_Initialize ();
3232
33- m_interruptData.m_HalQueue .Initialize ( (CLR_HW_Hardware::HalInterruptRecord*)&g_scratchInterruptDispatchingStorage, InterruptRecords () );
33+ m_interruptData.m_HalQueue .Initialize (
34+ (CLR_HW_Hardware::HalInterruptRecord *)&g_scratchInterruptDispatchingStorage,
35+ InterruptRecords ());
3436
35- m_interruptData.m_applicationQueue .DblLinkedList_Initialize ();
37+ m_interruptData.m_applicationQueue .DblLinkedList_Initialize ();
3638
3739 m_interruptData.m_queuedInterrupts = 0 ;
3840
39- m_DebuggerEventsMask = 0 ;
41+ m_DebuggerEventsMask = 0 ;
4042
4143#if defined(NANOCLR_ENABLE_SOURCELEVELDEBUGGING)
42- m_DebuggerEventsMask |= ExtractEventFromTransport ( HalSystemConfig.DebuggerPort );
44+ m_DebuggerEventsMask |= ExtractEventFromTransport (HalSystemConfig.DebuggerPort );
4345#endif
4446
4547 m_wakeupEvents = c_Default_WakeupEvents | m_DebuggerEventsMask;
46- m_powerLevel = PowerLevel__Active;
47-
48+ m_powerLevel = PowerLevel__Active;
49+
4850 m_fInitialized = true ;
4951 }
5052
@@ -68,7 +70,7 @@ void CLR_HW_Hardware::Hardware_Cleanup()
6870{
6971 NATIVE_PROFILE_CLR_HARDWARE ();
7072
71- if (m_fInitialized == true )
73+ if (m_fInitialized == true )
7274 {
7375 m_fInitialized = false ;
7476 }
@@ -85,96 +87,96 @@ void CLR_HW_Hardware::ProcessActivity()
8587{
8688 NATIVE_PROFILE_CLR_HARDWARE ();
8789
88- for (int i= 0 ; i< 10 ; i++)
90+ for (int i = 0 ; i < 10 ; i++)
8991 {
90- if (!HAL_CONTINUATION::Dequeue_And_Execute ()) break ;
92+ if (!HAL_CONTINUATION::Dequeue_And_Execute ())
93+ break ;
9194 }
9295
93- // UNDONE: FIXME:
94- // if(!msg.IsDebuggerInitialized())
96+ // UNDONE: FIXME:
97+ // if(!msg.IsDebuggerInitialized())
9598 // {
9699 // msg.InitializeDebugger();
97100 // }
98- // UNDONE: FIXME:msg.PurgeCache();
99-
100- // UNDONE: FIXME:dbg.PurgeCache();
101+ // UNDONE: FIXME:msg.PurgeCache();
102+
103+ // UNDONE: FIXME:dbg.PurgeCache();
101104
102- uint32_t events = ::Events_Get ( m_wakeupEvents );
105+ uint32_t events = ::Events_Get (m_wakeupEvents);
103106 uint32_t eventsCLR = 0 ;
104107
105- if (events & m_DebuggerEventsMask)
108+ if (events & m_DebuggerEventsMask)
106109 {
107- // dbg.ProcessCommands();
110+ // dbg.ProcessCommands();
108111
109112#if defined(PLATFORM_ARM) || defined(PLATFORM_ESP32)
110- if (CLR_EE_DBG_IS (RebootPending))
113+ if (CLR_EE_DBG_IS (RebootPending))
111114 {
112115#if !defined(BUILD_RTM)
113- CLR_Debug::Printf ( " Rebooting...\r\n " );
116+ CLR_Debug::Printf (" Rebooting...\r\n " );
114117#endif
115118
116- if (!CLR_EE_REBOOT_IS (ClrOnly))
119+ if (!CLR_EE_REBOOT_IS (ClrOnly))
117120 {
118- CLR_RT_ExecutionEngine::Reboot ( false );
121+ CLR_RT_ExecutionEngine::Reboot (false );
119122 }
120123 }
121124#endif
122125 }
123126
124- if (events & SYSTEM_EVENT_FLAG_COM_IN)
127+ if (events & SYSTEM_EVENT_FLAG_COM_IN)
125128 {
126- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_SerialPortIn ;
129+ eventsCLR |= Event_SerialPortIn ;
127130 }
128131
129- if (events & SYSTEM_EVENT_FLAG_COM_OUT)
132+ if (events & SYSTEM_EVENT_FLAG_COM_OUT)
130133 {
131- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_SerialPortOut ;
134+ eventsCLR |= Event_SerialPortOut ;
132135 }
133136
134- if ((events & SYSTEM_EVENT_HW_INTERRUPT)
137+ if ((events & SYSTEM_EVENT_HW_INTERRUPT)
135138#if defined(NANOCLR_ENABLE_SOURCELEVELDEBUGGING)
136139 || (!CLR_EE_DBG_IS (Stopped) && !g_CLR_HW_Hardware.m_interruptData .m_applicationQueue .IsEmpty ())
137140#endif // #if defined(NANOCLR_ENABLE_SOURCELEVELDEBUGGING)
138- )
141+ )
139142 {
140143 ProcessInterrupts ();
141144 }
142145
143- if (events & SYSTEM_EVENT_FLAG_SOCKET)
146+ if (events & SYSTEM_EVENT_FLAG_SOCKET)
144147 {
145- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_Socket ;
148+ eventsCLR |= Event_Socket ;
146149 }
147150
148- if (events & SYSTEM_EVENT_FLAG_SPI_MASTER)
151+ if (events & SYSTEM_EVENT_FLAG_SPI_MASTER)
149152 {
150- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_SpiMaster ;
153+ eventsCLR |= Event_SpiMaster ;
151154 }
152155
153- if (events & SYSTEM_EVENT_FLAG_I2C_MASTER)
156+ if (events & SYSTEM_EVENT_FLAG_I2C_MASTER)
154157 {
155- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_I2cMaster ;
158+ eventsCLR |= Event_I2cMaster ;
156159 }
157160
158- if (events & SYSTEM_EVENT_FLAG_ONEWIRE_MASTER)
161+ if (events & SYSTEM_EVENT_FLAG_ONEWIRE_MASTER)
159162 {
160- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_OneWireMaster ;
163+ eventsCLR |= Event_OneWireMaster ;
161164 }
162165
163- if (events & SYSTEM_EVENT_FLAG_STORAGE_IO)
166+ if (events & SYSTEM_EVENT_FLAG_STORAGE_IO)
164167 {
165- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_StorageIo ;
168+ eventsCLR |= Event_StorageIo ;
166169 }
167170
168- if (events & SYSTEM_EVENT_FLAG_RADIO)
171+ if (events & SYSTEM_EVENT_FLAG_RADIO)
169172 {
170- eventsCLR |= CLR_RT_ExecutionEngine::c_Event_Radio ;
173+ eventsCLR |= Event_Radio ;
171174 }
172175
173- if (eventsCLR)
176+ if (eventsCLR)
174177 {
175- g_CLR_RT_ExecutionEngine.SignalEvents ( eventsCLR );
178+ g_CLR_RT_ExecutionEngine.SignalEvents (eventsCLR);
176179 }
177180}
178181
179182// --//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//
180-
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