@@ -111,7 +111,7 @@ void SpiTransferCompleteCallback(NF_SpiDriver_Handle_t handle, Ecode_t transferS
111111 // // half duplex operation, clear output enable bit
112112 // palSpi->Handle->spi->CR1 &= ~SPI_CR1_BIDIOE;
113113 // }
114- NF_SpiDriver_Receive (palSpi->Handle , palSpi->ReadBuffer , palSpi->ReadSize , SpiTransferCompleteCallback);
114+ NF_SpiDriver_MReceive (palSpi->Handle , palSpi->ReadBuffer , palSpi->ReadSize , SpiTransferCompleteCallback);
115115 }
116116 else
117117 {
@@ -325,7 +325,7 @@ HRESULT CPU_SPI_nWrite_nRead(
325325 {
326326 // Full duplex
327327 // Uses the largest buffer size as transfer size
328- NF_SpiDriver_TransferBlocking (
328+ NF_SpiDriver_MTransferB (
329329 palSpi->Handle ,
330330 palSpi->WriteBuffer ,
331331 palSpi->ReadBuffer ,
@@ -340,7 +340,7 @@ HRESULT CPU_SPI_nWrite_nRead(
340340 // // half duplex operation, set output enable
341341 // palSpi->Handle->spi->CR1 |= SPI_CR1_BIDIOE;
342342 // }
343- NF_SpiDriver_TransmitBlocking (palSpi->Handle , palSpi->WriteBuffer , palSpi->WriteSize );
343+ NF_SpiDriver_MTransmitB (palSpi->Handle , palSpi->WriteBuffer , palSpi->WriteSize );
344344
345345 // receive operation
346346 // TODO
@@ -349,7 +349,7 @@ HRESULT CPU_SPI_nWrite_nRead(
349349 // // half duplex operation, set output enable
350350 // palSpi->Handle->spi->CR1 &= ~SPI_CR1_BIDIOE;
351351 // }
352- NF_SpiDriver_ReceiveBlocking (palSpi->Handle , palSpi->ReadBuffer , palSpi->ReadSize );
352+ NF_SpiDriver_MReceiveB (palSpi->Handle , palSpi->ReadBuffer , palSpi->ReadSize );
353353 }
354354 }
355355 else
@@ -364,7 +364,7 @@ HRESULT CPU_SPI_nWrite_nRead(
364364 // // half duplex operation, set output enable
365365 // palSpi->Handle->spi->CR1 &= ~SPI_CR1_BIDIOE;
366366 // }
367- NF_SpiDriver_ReceiveBlocking (palSpi->Handle , palSpi->ReadBuffer , palSpi->ReadSize );
367+ NF_SpiDriver_MReceiveB (palSpi->Handle , palSpi->ReadBuffer , palSpi->ReadSize );
368368 }
369369 else
370370 {
@@ -375,7 +375,7 @@ HRESULT CPU_SPI_nWrite_nRead(
375375 // half duplex operation, set output enable
376376 // palSpi->Handle->spi->CR1 |= SPI_CR1_BIDIOE;
377377 }
378- NF_SpiDriver_TransmitBlocking (palSpi->Handle , palSpi->WriteBuffer , palSpi->WriteSize );
378+ NF_SpiDriver_MTransmitB (palSpi->Handle , palSpi->WriteBuffer , palSpi->WriteSize );
379379 }
380380 }
381381
@@ -413,7 +413,7 @@ HRESULT CPU_SPI_nWrite_nRead(
413413 palSpi->SequentialTxRx = false ;
414414
415415 // Uses the largest buffer size as transfer size
416- NF_SpiDriver_Transfer (
416+ NF_SpiDriver_MTransfer (
417417 palSpi->Handle ,
418418 palSpi->WriteBuffer ,
419419 palSpi->ReadBuffer ,
@@ -433,7 +433,7 @@ HRESULT CPU_SPI_nWrite_nRead(
433433 }
434434
435435 // receive operation will be started in the callback after the above completes
436- NF_SpiDriver_Transmit (
436+ NF_SpiDriver_MTransmit (
437437 palSpi->Handle ,
438438 palSpi->WriteBuffer ,
439439 palSpi->WriteSize ,
@@ -449,7 +449,7 @@ HRESULT CPU_SPI_nWrite_nRead(
449449 palSpi->SequentialTxRx = false ;
450450
451451 // start receive
452- NF_SpiDriver_Receive (
452+ NF_SpiDriver_MReceive (
453453 palSpi->Handle ,
454454 palSpi->ReadBuffer ,
455455 palSpi->ReadSize ,
@@ -461,7 +461,7 @@ HRESULT CPU_SPI_nWrite_nRead(
461461 palSpi->SequentialTxRx = false ;
462462
463463 // start send
464- NF_SpiDriver_Transmit (
464+ NF_SpiDriver_MTransmit (
465465 palSpi->Handle ,
466466 palSpi->WriteBuffer ,
467467 palSpi->WriteSize ,
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