Update to IDF 5.4.1 and add basic ESP32_P4

Author: AdrianSoundy

CMake/binutils.ESP32.cmake

@@ -974,6 +974,10 @@ macro(nf_add_idf_as_library)
             PROPERTY COMPILE_DEFINITIONS ${IDF_LWIP_COMPILE_DEFINITIONS}
         )
 
+        #Enable Smartconfig
+        set(ESP32_ENABLE_SMARTCONFIG "ON" CACHE INTERNAL "Enable support for Smartconfig")
+
+
     endif()
 
     # need to add include path to find our ffconfig.h and target_platform.h

src/PAL/COM/sockets/ssl/MbedTLS/ssl_generic.cpp

@@ -190,6 +190,7 @@ __nfweak void mbedtls_net_free(mbedtls_net_context *ctx)
 
     ctx->fd = -1;
 }
+*/
 
 // get Unix Epoch time from HAL SystemTime
 time_t nf_get_unix_epoch()

targets/ESP32/ESP32_P4/target_windows_storage_config.h

@@ -0,0 +1,5 @@
+//
+// Copyright (c) .NET Foundation and Contributors
+// See LICENSE file in the project root for full license information.
+//
+

targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv

@@ -8,7 +8,7 @@ nvs,      data, nvs,     0x9000,   0x6000,
 phy_init, data, phy,     0xf000,   0x1000,
 # Factory area for nanoCLR - 1728k
 factory,  app, factory,  0x10000,  0x1B0000,
-# Deployment area for Managed code 192k
+# Deployment area for Managed code 12k
 deploy,   data, 0x84,    0x1C0000, 0x30000,
 # Config data for Network, Wireless, certificates, user data  64k
 config,   data, littlefs,  0x1F0000, 0x10000,

targets/ESP32/_Network/NF_ESP32_Ethernet.cpp

@@ -92,6 +92,69 @@ esp_eth_handle_t eth_handle = NULL;
 #endif // CONFIG_IDF_TARGET_ESP32P4
 
 
+#if CONFIG_IDF_TARGET_ESP32
+#define NANO_ETH_ESP32_EMAC_DEFAULT_CONFIG()               \
+    {                                                 \
+        .smi_gpio =                                   \
+        {                                             \
+            .mdc_num = 23,                            \
+            .mdio_num = 18                            \
+        },                                            \
+        .interface = EMAC_DATA_INTERFACE_RMII,        \
+        .clock_config =                               \
+        {                                             \
+            .rmii =                                   \
+            {                                         \
+                .clock_mode = DEFAULT_RMII_CLK_MODE,  \
+                .clock_gpio = (emac_rmii_clock_gpio_t)DEFAULT_RMII_CLK_GPIO   \
+            }                                         \
+        },                                            \
+        .dma_burst_len = ETH_DMA_BURST_LEN_32,        \
+        .intr_priority = 0,                           \
+    }
+#elif CONFIG_IDF_TARGET_ESP32P4
+#define NANO_ETH_ESP32_EMAC_DEFAULT_CONFIG()          \
+    {                                                 \
+        .smi_gpio =                                   \
+        {                                             \
+            .mdc_num = 31,                            \
+            .mdio_num = 27                            \
+        },                                            \
+        .interface = EMAC_DATA_INTERFACE_RMII,        \
+        .clock_config =                               \
+        {                                             \
+            .rmii =                                   \
+            {                                         \
+                .clock_mode = EMAC_CLK_EXT_IN,        \
+                .clock_gpio = 50                      \
+            }                                         \
+        },                                            \
+        .dma_burst_len = ETH_DMA_BURST_LEN_32,        \
+        .intr_priority = 0,                           \
+        .emac_dataif_gpio =                           \
+        {                                             \
+            .rmii =                                   \
+            {                                         \
+                .tx_en_num = 49,                      \
+                .txd0_num = 34,                       \
+                .txd1_num = 35,                       \
+                .crs_dv_num = 28,                     \
+                .rxd0_num = 29,                       \
+                .rxd1_num = 30                        \
+            }                                         \
+        },                                            \
+        .clock_config_out_in =                        \
+        {                                             \
+            .rmii =                                   \
+            {                                         \
+                .clock_mode = EMAC_CLK_EXT_IN,        \
+                .clock_gpio = -1                      \
+            }                                         \
+        },                                            \
+    }
+#endif // CONFIG_IDF_TARGET_ESP32P4
+
+
 esp_err_t NF_ESP32_InitialiseEthernet(uint8_t *pMacAdr)
 {
     (void)pMacAdr;