1717#include < rmt.h>
1818
1919// Reduce line lengths
20- #define ManagedRmtCommand Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtCommand
21- #define RmtChannel Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtChannel
22- #define CHANNEL (channel ) static_cast <rmt_channel_t >(channel)
20+ #define CHANNEL (channel ) static_cast <rmt_channel_t >(channel)
21+
22+ typedef enum __nfpack ChannelMode
23+ {
24+ ChannelMode_Receive = 0 ,
25+ ChannelMode_Transmit = 1 ,
26+ } ChannelMode;
2327
2428typedef enum __nfpack SourceClock
2529{
@@ -39,9 +43,9 @@ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Es
3943
4044struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_ReceiverChannel
4145{
42- static const int FIELD___receiveTimeout = 4 ;
46+ static const int FIELD___receiverChannelSettings = 2 ;
4347
44- NANOCLR_NATIVE_DECLARE (NativeRxInit___I4__I4__I4 );
48+ NANOCLR_NATIVE_DECLARE (NativeRxInit___I4 );
4549 NANOCLR_NATIVE_DECLARE (NativeRxStart___VOID__BOOLEAN);
4650 NANOCLR_NATIVE_DECLARE (NativeRxStop___VOID);
4751 NANOCLR_NATIVE_DECLARE (NativeRxGetRingBufferCount___I4);
@@ -52,26 +56,41 @@ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Es
5256
5357 // --//
5458
59+ static rmt_config_t GetNewRmtRxConfig (gpio_num_t pin, rmt_channel_t channel);
60+
5561 static HRESULT CreateRmtArrayOnStack (
5662 CLR_RT_StackFrame &stack,
5763 CLR_INT32 numItems,
5864 CLR_RT_TypeDef_Index &rmtCommandTypeDef,
5965 CLR_RT_HeapBlock **arrayDataPtr);
66+
6067 static HRESULT CreateRmtElement (
6168 rmt_item32_t *rmtItem,
6269 CLR_RT_HeapBlock *returnArray,
6370 CLR_RT_TypeDef_Index &rmtCommandTypeDef);
71+ };
6472
65- static esp_err_t InitRxChannel (rmt_channel_t channel, gpio_num_t gpio, int32_t rmtBufferSize, int32_t clockDiv);
73+ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_ReceiverChannelSettings
74+ {
75+ static const int FIELD___idleThreshold = 7 ;
76+ static const int FIELD___enableFilter = 8 ;
77+ static const int FIELD___filterThreshold = 9 ;
78+ static const int FIELD___receiveTimeout = 10 ;
79+ static const int FIELD___enableDemodulation = 11 ;
80+ static const int FIELD___carrierWaveFrequency = 12 ;
81+ static const int FIELD___carrierWaveDutyPercentage = 13 ;
82+ static const int FIELD___carrierLevel = 14 ;
83+
84+ // --//
6685};
6786
6887struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtChannel
6988{
70- static const int FIELD___channel = 1 ;
71- static const int FIELD___clockDivider = 2 ;
72- static const int FIELD___sourceClock = 3 ;
89+ static const int FIELD___settings = 1 ;
7390
91+ NANOCLR_NATIVE_DECLARE (NativeSetGpioPin___VOID__I4__U1__I4__BOOLEAN);
7492 NANOCLR_NATIVE_DECLARE (NativeSetClockDivider___VOID__U1);
93+ NANOCLR_NATIVE_DECLARE (NativeSetNumberOfMemoryBlocks___VOID__U1);
7594
7695 // --//
7796
@@ -81,28 +100,49 @@ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Es
81100 static CLR_INT32 FindNextChannel ();
82101};
83102
103+ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtChannelSettings
104+ {
105+ static const int FIELD___channel = 1 ;
106+ static const int FIELD___pinNumber = 2 ;
107+ static const int FIELD___clockDivider = 3 ;
108+ static const int FIELD___numberOfMemoryBlocks = 4 ;
109+ static const int FIELD___bufferSize = 5 ;
110+ static const int FIELD___signalInverterEnabled = 6 ;
111+
112+ // --//
113+ };
114+
115+ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_TransmitChannelSettings
116+ {
117+ static const int FIELD___enableCarrierWave = 7 ;
118+ static const int FIELD___carrierLevel = 8 ;
119+ static const int FIELD___carrierWaveFrequency = 9 ;
120+ static const int FIELD___carrierWaveDutyPercentage = 10 ;
121+ static const int FIELD___enableLooping = 11 ;
122+ static const int FIELD___loopCount = 12 ;
123+ static const int FIELD___enableIdleLevelOutput = 13 ;
124+ static const int FIELD___idleLevel = 14 ;
125+
126+ // --//
127+ };
128+
84129struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_TransmitterChannel
85130{
86- static const int FIELD___carrierEnabled = 4 ;
87- static const int FIELD___carrierHighDuration = 5 ;
88- static const int FIELD___carrierLowDuration = 6 ;
89- static const int FIELD___carrierLevel = 7 ;
90- static const int FIELD___commands = 8 ;
91-
92- NANOCLR_NATIVE_DECLARE (NativeInit___VOID__I4);
93- NANOCLR_NATIVE_DECLARE (NativeGetIdleLevel___BOOLEAN);
94- NANOCLR_NATIVE_DECLARE (NativeGetIsChannelIdle___BOOLEAN);
95- NANOCLR_NATIVE_DECLARE (NativeSetIsChannelIdle___VOID__BOOLEAN);
96- NANOCLR_NATIVE_DECLARE (NativeSetIdleLevel___VOID__BOOLEAN);
97- NANOCLR_NATIVE_DECLARE (NativeSetCarrierMode___VOID);
98- NANOCLR_NATIVE_DECLARE (NativeWriteItems___U4__SZARRAY_U1__BOOLEAN);
99- NANOCLR_NATIVE_DECLARE (NativeWaitTxDone___U4__I4);
100- NANOCLR_NATIVE_DECLARE (NativeDispose___VOID);
101- NANOCLR_NATIVE_DECLARE (NativeGetSourceClock___BOOLEAN);
131+ static const int FIELD___transmitterChannelSettings = 2 ;
132+ static const int FIELD___commands = 3 ;
133+
134+ NANOCLR_NATIVE_DECLARE (NativeTxInit___I4);
135+ NANOCLR_NATIVE_DECLARE (NativeTxGetIsChannelIdle___BOOLEAN);
136+ NANOCLR_NATIVE_DECLARE (NativeTxSetLoopingMode___VOID__BOOLEAN);
137+ NANOCLR_NATIVE_DECLARE (NativeTxSetLoopCount___VOID__I4);
138+ NANOCLR_NATIVE_DECLARE (NativeTxSetCarrierMode___VOID);
139+ NANOCLR_NATIVE_DECLARE (NativeTxSetIdleLevel___VOID__BOOLEAN);
140+ NANOCLR_NATIVE_DECLARE (NativeTxWriteItems___U4__SZARRAY_U1__BOOLEAN);
141+ NANOCLR_NATIVE_DECLARE (NativeTxDispose___VOID);
102142
103143 // --//
104144
105- static esp_err_t InitTxChannel ( rmt_channel_t channel, gpio_num_t gpio );
145+ static rmt_config_t GetNewRmtTxConfig ( gpio_num_t pin, rmt_channel_t channel );
106146};
107147
108148extern const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Hardware_Esp32_Rmt;
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